TAS3103A Datasheet, PDF (80/152 Pages) Texas Instruments – Digital Audio Processor With 3D Effects

Table 3−3. Treble Shelf Filter Indices for 1/2-dB Adjustments
ADJUSTMENT
(dB)
INDEX(1)
ADJUSTMENT
(dB)
INDEX(1)
ADJUSTMENT
(dB)
INDEX(1)
18
0x01
5.5
0x63
−7
0x80
17.5
0x09
5
0x65
−7.5
0x81
17
0x10
4.5
0x66
−8
0x82
16.5
0x16
40
0x68
−8.5
0x83
16
0x1C
3.5
0x69
−9
0x84
15.5
0x22
3
0x6B
−9.5
0x85
15
0x28
2.5
0x6C
−10
0x86
14.5
0x2D
2
0x6D
−10.5
0x87
14
0x31
1.5
0x6F
−11
0x88
13.5
0x35
1
0x70
−11.5
0x89
13
0x3A
0.5
0x71
−12
0x8A
12.5
0x3E
0
0x72
−12.5
0x8B
12
0x42
−0.5
0x73
−13
0x8C
11.5
0x45
−1
0x74
−13.5
0x8D
11
0x49
−1.5
0x75
−14
0x8E
10.5
0x4C
−2
0x76
−14.5
0x8F
10
0x4F
−2.5
0x77
−15
0x90
9.5
0x52
−3
0x78
−15.5
0x91
9
0x55
−3.5
0x79
−16
0x92
8.5
0x57
−4
0x7A
−16.5
0x93
8
0x5A
−4.5
0x7B
−17
0x94
7.5
0x5C
−5
0x7C
−17.5
0x95
7
0x5E
−5.5
0x7D
−18
0x96
6.5
0x60
−6
0x7E
6
0x62
−6.5
0x7F
(1) CH1 index is subaddress 0xF8, bit field 7:0. CH2 index is subaddress 0xF8, bit field 15:8. CH3 index
is subaddress 0xF8, bit field 23:16.
3.5.1 Treble and Bass Processing and Concurrent I²C Read Transactions
I²C read transactions at subaddresses 0x01 through 0xD1 are not allowed during: (1) transitions between filter
shelves within a given bass or treble filter set or (2) transitions between filter sets. This means that after issuing an
I²C command to change treble or bass filter shelves or filter sets, time must be allowed to complete the bass/treble
activity before proceeding to read subaddresses 0x01 through 0xD1. No subaddress is available to monitor
bass/treble activity directly. However, the state of bass/treble activity can be probed via the factory test subaddresses
0xEC and 0xED.
If it is required to read subaddress data that falls in the subaddress range of 0x01 through 0xD1 after issuing an I²C
command to change treble or bass filter shelves or filter sets, the procedure presented in Figure 3−15 can be used
to monitor bass/treble activity. As Figure 3−15 shows, six readings must be taken to verify that none of the three
monaural channels have ongoing bass or treble activity. If all six readings show the value zero in the 8^th or least
significant byte of the 8-byte data word output at subaddress 0xED, then all commanded bass/treble activity has
completed and it is safe to resume I²C read transactions at subaddresses 0x01 through 0xD1.
3−16