TRF7960A Datasheet, PDF (8/68 Pages) Texas Instruments – MULTI-PROTOCOL FULLY INTEGRATED 13.56-MHz RFID READER/WRITER IC

TRF7960A
SLOS732 – JUNE 2011
www.ti.com
3.4 Electrical Characteristics
T_A = 25°C, VIN = 5 V, full-power mode (unless otherwise noted)
PARAMETER
CONDITIONS
MIN TYP
MAX UNIT
All building blocks disabled, including
I_PD1
Supply current in Power Down Mode 1 supply-voltage regulators; measured after
500-ms settling time (EN = 0, EN2 = 0)
<0.5
5 µA
I_PD2
Supply current in Power Down Mode 2
(Sleep Mode)
The SYS_CLK generator and VDD_X remain
active to support external circuitry, measured
after 100-ms settling time (EN = 0, EN2 = 1)
120
200 µA
I_STBY
Supply current in stand-by mode
Oscillator running, supply-voltage regulators in
low-consumption mode (EN = 1, EN2 = x)
1.9
3.5 mA
I_ON1
Supply current without antenna driver Oscillator, regulators, RX, and AGC are active,
current
TX is off
10.5
14 mA
I_ON2
I_ON3
V_POR
V_BG
VDD_A
Supply current – TX (half power)
Supply current – TX (full power)
Power-on reset voltage
Bandgap voltage (pin 11)
Regulated output voltage for analog
circuitry (pin 1)
Oscillator, regulators, RX, AGC, and TX
active, P_OUT = 100 mW
Oscillator, regulators, RX, AGC, and TX
active, P_OUT = 200 mW
Input voltage at VIN
Internal analog reference voltage
VIN = 5 V
70
130
1.4
2
1.5 1.6
3.1 3.5
78 mA
170 mA
2.6 V
1.7 V
3.8 V
VDD_X Regulated supply for external circuitry Output voltage pin 32, VIN = 5 V
3.1 3.4
3.8 V
I_{VDD_Xmax}
R_RFOUT
Maximum output current of VDD_X
Antenna driver output resistance⁽¹⁾
Output current pin 32, VIN = 5 V
Half power mode, VIN = 2.7 V to 5.5 V
Full power mode, VIN = 2.7 V to 5.5 V
20 mA
8
12 Ω
4
6Ω
R_RFIN
V_{RF_INmax}
RX_IN1 and RX_IN2 input resistance
Maximum RF input voltage at RX_IN1,
RX_IN2
V_{RF_INmax} should not exceed VIN
4
10
3.5
20 kΩ
V_pp
V_{RF_INmin}
Minimum RF input voltage at RX_IN1,
RX_IN2 (input sensitivity)⁽²⁾
f_SUBCARRIER = 424 kHz
1.4
2.5 mV_pp
f_{SYS_CLK}
f_C
t_CRYSTAL
SYS_CLK frequency
Carrier frequency
Crystal run-in time
f_SUBCARRIER = 848 kHz
In power mode 2, EN = 0, EN2 = 1
Defined by external crystal
Time until oscillator stable bit is set (register
0x0F) ⁽³⁾
2.1
25
60
13.56
5
3 mV_pp
120 kHz
MHz
ms
f_{D_CLKmax} Maximum DATA_CLK frequency⁽⁴⁾
Depends on capacitive load on the I/O lines,
recommendation is 2 MHz⁽⁴⁾
2
8
10 MHz
V_IL
Input voltage, logic low
I/O lines, IRQ, SYS_CLK, DATA_CLK, EN,
EN2
0.2
VDD_I/O
V
V_IH
Input voltage threshold, logic high
I/O lines, IRQ, SYS_CLK, DATA_CLK, EN,
EN2
0.8
VDD_I/O
V
R_OUT
R_{SYS_CLK}
Output resistance, I/O_0 to I/O_7
Output resistance R_{SYS_CLK}
500
800 Ω
200
400 Ω
(1) Antenna driver output resistance
(2) Measured with subcarrier signal at RX_IN1/2 and measured the digital output at MOD pin with register 0x1A bit 6 = 1
(3) Depending on the crystal parameters and components
(4) Recommended DATA_CLK speed is 2 MHz; higher data clock depends on the capacitive load. Maximum SPI clock speed should not
exceed 10 MHz. This clock speed is acceptable only when external capacitive load is less than 30 pF. MISO driver has a typical output
resistance of 400 Ω (12-ns time constant when 30-pF load is used).
8
Electrical Characteristics
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