English
Language : 

LM3017_15 Datasheet, PDF (8/33 Pages) Texas Instruments – High Efficiency Low-Side Controller with True Shutdown
LM3017
SNOSC66C – MARCH 2012 – REVISED MARCH 2013
FUNCTIONAL BLOCK DIAGRAM
VG
ISEN
Ramp Adjust
Pass
Control
Charge
Pump
1.27V
Reference
Limit
References
Soft
Start
Current
A Sense
Amp.
200 mV
+
Limit
-
Short-circuit
Comparator
Level
Shifter
+
PWM
-
Drive
Logic
VIN
Internal
Reg
www.ti.com
VCC
DR
+
-E.A.
EN/MODE
Logic
OVP
+
-
Internal Slope
Compensation
OSC
FB
EN/MODE
COMP
AGND
PGND
FUNCTIONAL DESCRIPTION
The LM3017 uses a fixed frequency, Pulse Width Modulated (PWM), current mode control architecture. A high-
side current sense amplifier provides inductor current information by sensing the voltage drop across RSEN. The
voltage across this resistor is fed into the ISEN pin. This voltage is then level shifted and fed into the positive input
of the PWM comparator. As with all architectures of this type, a compensation ramp is required to ensure stability
of the current control loop under all operating conditions. A nominal value of the ramp is provided internally while
additional ramp can be added through the ISEN pin. The output voltage is sensed through an external feedback
resistor divider network and fed into the error amplifier (EA) negative input (feedback pin, FB). The output of the
error amplifier (COMP pin) is added to the slope compensation ramp and fed into the negative input of the PWM
comparator.
At the start of any switching cycle, the oscillator sets a high signal on the DR pin (gate of the external MOSFET)
and the external MOSFET turns on. When the voltage on the positive input of the PWM comparator exceeds the
negative input, the Drive Logic is reset and the external MOSFET turns off.
Under extremely light load or no-load conditions, the energy delivered to the output capacitor when the external
MOSFET is on during the minimum on time is more than what is delivered to the load. An over-voltage
comparator inside the LM3017 prevents the output voltage from rising under these conditions by sensing the
feedback (FB pin) voltage and resetting the RS latch. The latch remains in a reset state until the output decays to
the nominal value. Thus the operating frequency decreases at light loads, resulting in excellent efficiency.
8
Submit Documentation Feedback
Product Folder Links :LM3017
Copyright © 2012–2013, Texas Instruments Incorporated