English
Language : 

CD54HC237 Datasheet, PDF (8/16 Pages) Texas Instruments – High-Speed CMOS Logic, 3- to 8-Line Decoder/Demultiplexer with Address Latches
CD74HC137, CD74HCT137, CD54HC237, CD74HC237, CD74HCT237
Test Circuits and Waveforms (Continued)
trCL
CLOCK
INPUT
90%
10%
tH(H)
tfCL
50%
tH(L)
DATA
INPUT
tSU(H)
tSU(L)
OUTPUT
tREM
VCC
SET, RESET
OR PRESET
tTLH
90%
tPLH
50%
tTHL
90%
50%
10%
tPHL
IC
CL
50pF
VCC
GND
VCC
50%
GND
GND
trCL
CLOCK
INPUT
2.7V
0.3V
tfCL
1.3V
tH(H)
tH(L)
DATA
INPUT
tSU(H)
1.3V
1.3V
1.3V
tSU(L)
OUTPUT
tREM
3V
SET, RESET
OR PRESET
tTLH
90%
1.3V
tPLH
1.3V
tTHL
90%
1.3V
10%
tPHL
IC
CL
50pF
3V
GND
3V
GND
GND
FIGURE 5. HC SETUP TIMES, HOLD TIMES, REMOVAL TIME,
AND PROPAGATION DELAY TIMES FOR EDGE
TRIGGERED SEQUENTIAL LOGIC CIRCUITS
FIGURE 6. HCT SETUP TIMES, HOLD TIMES, REMOVAL TIME,
AND PROPAGATION DELAY TIMES FOR EDGE
TRIGGERED SEQUENTIAL LOGIC CIRCUITS
8