BQ27421-G1 Datasheet, PDF (8/20 Pages) Texas Instruments – System-Side Impedance Track™ Fuel Gauge With Integrated Sense Resistor

bq27421-G1
SLUSB85 – MAY 2013
www.ti.com
I²C-COMPATIBLE INTERFACE COMMUNICATION TIMING CHARACTERISTICS
T_A = –40°C to 85°C; typical values at T_A = 30°C and V_REGIN = 3.6 V (unless otherwise noted) (Force Note1)⁽¹⁾
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Standard Mode (100 kHz)
t_d(STA)
Start to first falling edge of SCL
4.0
t_w(L)
SCL pulse duration (low)
4.7
t_w(H)
SCL pulse duration (high)
4.0
t_su(STA)
Setup for repeated start
4.7
t_su(DAT)
Data setup time
Host drives SDA
250
t_h(DAT)
Data hold time
Host drives SDA
0
t_su(STOP)
Setup time for stop
4.0
t_(BUF)
Bus free time between stop and Includes Command Waiting Time
66
start
t_f
SCL/SDA fall time ⁽¹⁾
t_r
SCL/SDA rise time ⁽¹⁾
f_SCL
Clock frequency⁽²⁾
Fast Mode (400 kHz)
μs
μs
μs
μs
ns
ns
μs
μs
300 ns
300 ns
100 kHz
t_d(STA)
t_w(L)
t_w(H)
t_su(STA)
t_su(DAT)
t_h(DAT)
t_su(STOP)
t_(BUF)
t_f
t_r
f_SCL
Start to first falling edge of SCL
SCL pulse duration (low)
SCL pulse duration (high)
Setup for repeated start
Data setup time
Host drives SDA
Data hold time
Host drives SDA
Setup time for stop
Bus free time between stop and
start
SCL/SDA fall time ⁽¹⁾
SCL/SDA rise time ⁽¹⁾
Clock frequency⁽²⁾
Includes Command Waiting Time
600
1300
600
600
100
0
600
66
ns
ns
ns
ns
ns
ns
ns
μs
300 ns
300 ns
400 kHz
(1) Specified by design. Not production tested.
(2) If the clock frequency (f_SCL) is > 100 kHz, use 1-byte write commands for proper operation. All other transactions types are supported at
400 kHz. (Refer to I²C INTERFACE and I²C Command Waiting Time)
t_SU(STA)
t_w(H)
t_w(L)
t_f
t_r
t_(BUF)
SCL
SDA
t_d(STA)
t_f
t_r
t_h(DAT)
t_su(DAT)
t_su(STOP)
REPEATED
START
STOP
START
Figure 2. I²C-Compatible Interface Timing Diagrams
8
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