CC2520 Datasheet, PDF (78/134 Pages) Texas Instruments – 2.4 GHZ IEEE 802.15.4/ZIGBEE® RF TRANSCEIVER

CC2520 DATASHEET
2.4 GHZ IEEE 802.15.4/ZIGBEE® RF TRANSCEIVER
SWRS068 – DECEMBER 2007
• An extended address entry consists only of the 64-bit IEEE extended address. These entries are
stored at address 0x380 + (8 × n), where n is a number between 0 and 11.
Address Enable Registers
Software is responsible for allocating table entries and for making sure that active short and extended
address entries do not overlap. There are separate enable bits for short and extended addresses:
• Short address entries are enabled in the SRCSHORTEN0, SRCSHORTEN1 and SRCSHORTEN2
registers. Register bit n corresponds to short address entry n.
• Extended address entries are enabled in the SRCEXTEN0, SRCEXTEN1 and SRCEXTEN2
registers. In this case register bit 2n corresponds to extended address entry n. This mapping is
convenient when creating a combined bit vector (of short and extended enable bits) to find unused
entries. Moreover, when read, register bit 2n+1 will always have the same value as register bit 2n,
since an extended address occupies the same memory as two short address entries.
Figure 22 - Example of enabled table entries
Matching Algorithm
The SRCMATCH.SRC_MATCH_EN bit controls whether source address matching is enabled or not. When
enabled (which is the default setting) and a frame passes the filtering algorithm, the CC2520 will apply one
of the algorithms outlined in Figure 22, depending on which type of source address is present.
The result is reported in two different forms:
• A 24-bit vector called SRCRESMASK contains a ’1’ for each enabled short entry with a match, or two
’1’s for each enabled extended entry with a match (the bit mapping is the same as for the address
enable registers upon read access).
• A 7-bit value called SRCRESINDEX:
• When no source address is present in the received frame, or there is no match on the received
source address:
• Bits 6:0: 0x3F
• If there is a match on the received source address:
• Bits 4:0: The index of the first entry (i.e. the one with the lowest index number) with a match, 0-
23 for short addresses or 0-11 for extended addresses.
• Bit 5: ’0’ if the match is on a short address, ’1’ if the match is on an extended address.
• Bit 6: The result of the AUTOPEND function
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