TPS65930 Datasheet, PDF (71/114 Pages) Texas Instruments – Integrated Power Management Audio Codec (TPS65930 Only)

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UCLK
STP
DIR_&_NXT
DATA[7:0]
TPS65930/TPS65920
Integrated Power Management
\Audio Codec (TPS65930 Only)
SWCS037D – MAY 2008 – REVISED JUNE 2009
HSU0
HSU1
HSU1
HSU4
HSU5
HSU2
HSU2
HSU3
Data_OUT
HSU3
HSU6
Data_IN
HSU7
Figure 7-3. HS-USB Interface—Transmit and Receive Modes (ULPI 8-bit)
037-049
NOTE
ULPI data [7:0] lines are set to 1 after USB PHY power up, and before the clock signal is
stable.
The input timing requirements are given by considering a rising or falling time of 1 ns (see Table 7-1).
Notation
HSU4
HSU5
HSU6
HSU7
Table 7-1. HS-USB Interface Timing Requirements
t_s(STPV-CLKH)
t_{h(CLKH-STPIV)}
t_{s(DATAV-CLKH)}
t_{h(CLKH-DATIV)}
Parameter
Setup time, STP valid before UCLK rising
edge
Hold time, STP valid after UCLK rising edge
Setup time, DATA[0:7] valid before UCLK
rising edge
Hold time, DATA[0:7] valid after UCLK rising
edge
Min
Max Unit
6
ns
0
ns
6
ns
0
ns
Table 7-2 lists the HS-USB interface switching requirements.
Table 7-2. HS-USB Interface Switching Requirements⁽¹⁾
Notation
Parameter ⁽¹⁾
Min
HSU0
HSU1
HSU2
f_p(CLK)
t_W(CLK)
t_d(CLKH-DIR)
t_d(CLKH-NXTV)
UCLK clock frequency
UCLK duty cycle
Delay time, UCLK rising edge to
DIR transition
Delay time, UCLK rising edge to
NXT transition
Steady state
Steady state
Steady state
Steady state
58.42
48.3%
0
0
HSU3
t_d(CLKH-DATV)
Delay time, UCLK rising edge to Steady state
0
DATA[0:7] transition
(1) The capacitive load for output data and control load is 10 pF (rising and falling time is 2 ns).
The capacitive load for the CLK port is 6 pF (rising and falling time is 1 ns).
The HS-USB interface has only one state: the steady state.
Typ
60
50%
Max
61.67
51.7%
9
Unit
MHz
ns
9 _ns
9 _ns
7.1.3 USB-CEA Carkit Port Timing
This mode allows the link for communication through the USB PHY to a remote carkit in CEA audio + data
during audio (DDA) mode as defined in the CEA-936A specification. In this mode, the ULPI data bus is
redefined as a 2-pin UART interface, which exchanges data through a direct access to the FS/LS analog
transmitter and receiver.
UART data are sent and received on the USB D+/D– pads. D+/D– are also used in this mode to carry
audio I/O signals.
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USB Transceiver
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