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TMDS341 Datasheet, PDF (7/25 Pages) Texas Instruments – 3-TO-1 DVI/HDMI SWITCH
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TMDS341
www.ti.com
SLLS660A – AUGUST 2005 – REVISED OCTOBER 2005
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range (unless otherwise noted)(1)
Supply voltage range, VCC(2)
Anm(3), Bnm
Voltage range
Ym, Zm, VSADJ, PRE, Sn, OE, HPDn
SCLn, SCL_SINK, SDAn, SDA_SINK, HPD_SINK
Human body model(4) (all pins)
Electrostatic discharge
Charged-device model(5) (all pins)
Machine model (6) (all pins)
Continuous power dissipation
UNIT
–0.5 V to 4 V
1.7 V to 4 V
–0.5V to 4 V
–0.5 V to 6 V
±3 kV
±1500 V
± 200 V
See Dissipation Rating Table
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltage values, except differential I/O bus voltages, are with respect to network ground terminal.
(3) n = 1, 2, 3; m = 1, 2, 3, 4
(4) Tested in accordance with JEDEC Standard 22, Test Method A114-B
(5) Tested in accordance with JEDEC Standard 22, Test Method C101-A
(6) Tested in accordance with JEDEC Standard 22, Test Method A115-A
DISSIPATION RATINGS
PACKAGE
80-TQFP
TA ≤ 25°C
971 mW
DERATING FACTOR (1)
ABOVE TA = 25°C
9.7 mW/°C
(1) This is the inverse of the junction-to-ambient thermal resistance when board-mounted and with no air flow.
TA = 70°C
POWER RATING
534 mW
RECOMMENDED OPERATING CONDITIONS
VCC
Supply voltage
TA
Operating free-air temperature
TMDS DIFFERENTIAL PINS (A/B)
VID
VIC
RVSADJ
AVCC
RT
Receiver peak-to-peak differential input voltage
Input common mode voltage
Resistor for TMDS compliant voltage swing range
TMDS output termination voltage, see Figure 1
Termination resistance, see Figure 1
Signaling rate
CONTROL PINS (PRE; S, OE)
VIH
LVTTL High-level input voltage
VIL
LVTTL Low-level input voltage
DDC I/O PINS (SCL, SCL_SINK, SDA, SDA_SINK)
VI(DDC)
Input voltage
STATUS PINS (HPD_SINK)
VIH
LVTTL High-level input voltage
VIL
LVTTL Low-level input voltage
MIN NOM
3 3.3
0
MAX
3.6
70
UNIT
V
°C
150
1560 mVp-p
2
VCC–0.04 V
4.6 4.64
4.68 kΩ
3 3.3
3.6 V
45
50
55 Ω
0
1.65 Gbps
2
GND
VCC
V
0.8 V
GND
5.3 V
2
GND
5.3 V
0.8 V
7
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