TLC7524C_15 Datasheet, PDF (7/23 Pages) Texas Instruments – 8-BIT MULTIPLYING DIGITAL-TO-ANALOG CONVVERTERS

TLC7524C, TLC7524E, TLC7524I
8ĆBIT MULTIPLYING DIGITALĆTOĆANALOG CONVERTERS
SLAS061D − SEPTEMBER 1986 − REVISED JUNE 2007
PRINCIPLES OF OPERATION
Vref VDD
RA = 2 kΩ
RB
(see Note A)
DB0−DB7
CS
WR
RFB
OUT1
GND
OUT2
C (see Note B)
−
+
Output
NOTES: A. RA and RB used only if gain adjustment is required.
B. C phase compensation (10-15 pF) is required when using high-speed amplifiers to prevent
ringing or oscillation.
Figure 3. Unipolar Operation (2-Quadrant Multiplication)
Vref ^VDD
RA = 2 kΩ
(see Note A)
DB0−DB7
CS
WR
RB
RFB
OUT1
GND
OUT2
20 kΩ
C (see Note B)
−
+
20 kΩ
−
10 kΩ
+
5 kΩ
Output
NOTES: A. RA and RB used only if gain adjustment is required.
B. C phase compensation (10-15 pF) is required when using high-speed amplifiers to prevent ringing or oscillation.
Figure 4. Bipolar Operation (4-Quadrant Operation)
Table 1. Unipolar Binary Code
DIGITAL INPUT
(see Note 3)
MSB
LSB
ANALOG OUTPUT
11111111
10000001
10000000
01111111
00000001
00000000
−Vref (255/256)
−Vref (129/256)
−Vref (128/256) = − Vref/2
−Vref (127/256)
−Vref (1/256)
0
NOTE 3: LSB = 1/256 (Vref)
Table 2. Bipolar (Offset Binary) Code
DIGITAL INPUT
(see Note 4)
MSB
LSB
ANALOG OUTPUT
11111111
10000001
10000000
Vref (127/128)
Vref (1/128)
0
01111111
00000001
00000000
−Vref (1/128)
−Vref (127/128)
− Vref
NOTE 4: LSB = 1/128 (Vref)
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