SN55LVDS32 Datasheet, PDF (7/37 Pages) Texas Instruments – HIGH-SPEED DIFFERENTIAL LINE RECEIVERS

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SN55LVDS32, SN65LVDS32, SN65LVDS3486, SN65LVDS9637
HIGHĆSPEED DIFFERENTIAL LINE RECEIVERS
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SLLS262N − JULY 1997 − REVISED MARCH 2004
SN65LVDSxxxx electrical characteristics over recommended operating conditions (unless
otherwise noted)
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ _PARAMETER
TEST CONDITIONS
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ _VIT+
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ _VIT−
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ _VOH
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ _VOL
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ _ICC
Positive-going differential input voltage threshold
Negative-going differential input voltage threshold‡
High-level output voltage
Low-level output voltage
Supply current
SN65LVDS32,
SN65LVDS3486
SN65LVDS9637
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ _II
Input current (A or B inputs)
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ _{II(OFF) Power-off input current (A or B inputs)}
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ _IIH
High-level input current (EN, G, or G inputs)
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ IIL
Low-level input current (EN, G, or G inputs)
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ^IOZ
High-impedance output current
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ^{†All typical values are at TA = 25°C and with VCC = 3.3 V.}
See Figure 2 and Table 1
See Figure 2 and Table 1
IOH = −8 mA
IOH = −4 mA
IOL = 8 mA
Enabled,
No load
Disabled
No load
VI = 0
VI = 2.4 V
VCC = 0,
VI = 3.6 V
VIH = 2 V
VIL = 0.8 V
VO = 0 or VCC
SN65LVDS32
SN65LVDS3486
SN65LVDS9637
MIN TYP† MAX
100
−100
2.4
2.8
0.4
10
18
0.25 0.5
5.5
10
−2 −10 −20
−1.2 −3
6
20
10
10
±10
UNIT
mV
mV
V
V
mA
µA
µA
µA
µA
µA
‡ _{The algebraic convention, in which the less-positive (more-negative) limit is designated minimum, is used in this data sheet for the negative-going}
differential input voltage threshold only.
SN65LVDSxxxx switching characteristics over recommended operating conditions (unless
otherwise noted)
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ _PARAMETER
TEST CONDITIONS
SN65LVDS32
SN65LVDS3486
SN65LVDS9637
UNIT
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ _{MIN TYP MAX}
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ _{tPLH Propagation delay time, low-to-high-level output}
1.5 2.1
3 ns
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ _{tPHL Propagation delay time, high-to-low-level output}
1.5 2.1
3 ns
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ _tsk(p)
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ _tsk(o)
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ tsk(pp)
Pulse skew (|tPHL − tPLH|)
Channel-to-channel output skew§
Part-to-part skew¶
CL = 10 pF, See Figure 3
0 0.4 ns
0.1 0.3 ns
1 ns
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ^tr
Output signal rise time, 20% to 80%
0.6
ns
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ^tf
Output signal fall time, 80% to 20%
0.7
ns
tPHZ Propagation delay time, high-level-to-high-impedance output
6.5
12 ns
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ _tPLZ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ _tPZH
Propagation delay time, low-level-to-high-impedance output
Propagation delay time, high-impedance-to-high-level output
See Figure 4
5.5
12 ns
8
12 ns
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ _{tPZL Propagation delay time, high-impedance-to-low-level output}
3
12 ns
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ § _{tsk(o) is the skew between specified outputs of a single device with all driving inputs connected together and the outputs switching in the same}
direction while driving identical specified loads.
¶ _{tsk(pp) is the magnitude of the difference in propagation delay times between any specified terminals of two devices when both devices operate}
with the same supply voltages, same temperature, and have identical packages and test circuits.
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