PCA9554A Datasheet, PDF (7/33 Pages) Texas Instruments – REMOTE 8-BIT I2C AND SMBus I/O EXPANDER WITH INTERRUPT OUTPUT AND CONFIGURATION REGISTERS

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PCA9554A
REMOTE 8-BIT I²C AND SMBus I/O EXPANDER
WITH INTERRUPT OUTPUT AND CONFIGURATION REGISTERS
SCPS127A – SEPTEMBER 2006 – REVISED FEBRUARY 2007
Device Address
Figure 4 shows the address byte for the PCA9554A.
Slave Address
0 1 1 1 A2 A1 A0 R/W
Fixed
Hardware
Selectable
Figure 4. PCA9554A Address
Address Reference
INPUTS
A2
A1
A0
L
L
L
L
L
H
L
H
L
L
H
H
H
L
L
H
L
H
H
H
L
H
H
H
I²C BUS SLAVE ADDRESS
56 (decimal), 38 (hexadecimal)
57 (decimal), 39 (hexadecimal)
58 (decimal), 3A (hexadecimal)
59 (decimal), 3B (hexadecimal)
60 (decimal), 3C (hexadecimal)
61 (decimal), 3D (hexadecimal)
62 (decimal), 3E (hexadecimal)
63 (decimal), 3F (hexadecimal)
The last bit of the slave address defines the operation (read or write) to be performed. When it is high (1), a read
is selected. A low (0) selects a write operation.
Control Register and Command Byte
Following the successful acknowledgment of the address byte, the bus master sends a command byte that is
stored in the control register in the PCA9554A. Two bits of this command byte state the operation (read or write)
and the internal register (input, output, polarity inversion or configuration) that will be affected. This register can
be written or read through the I²C bus. The command byte is sent only during a write transmission.
Once a command byte has been sent, the register that was addressed continues to be accessed by reads until
a new command byte has been sent.
0 0 0 0 0 0 B1 B0
Figure 5. Control Register Bits
CONTROL REGISTER BITS
B1
B0
0
0
0
1
1
0
1
1
Command Byte
COMMAND BYTE
(HEX)
0x00
0x01
0x02
0x03
REGISTER
Input Port Register
Output Port Register
Polarity Inversion Register
Configuration Register
PROTOCOL
Read byte
Read/write byte
Read/write byte
Read/write byte
POWER-UP
DEFAULT
XXXX XXXX
1111 1111
0000 0000
1111 1111
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