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OPA129UE4 Datasheet, PDF (7/14 Pages) Texas Instruments – Ultra-Low Bias Current Difet PERATIONAL AMPLIFIER | |||
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CIRCUIT BOARD LAYOUT
The OPA129 uses a new pinout for ultra low input bias
current. Pin 1 and pin 4 have no internal connection. This
allows ample circuit board space for a guard ring surround-
ing the op amp input pinsâeven with the tiny SO-8 surface-
mount package. Figure 3 shows suggested circuit board
layouts. The guard ring should be connected to pin 8 (sub-
strate) as shown. It should be driven by a circuit node equal
in potential to the input terminals of the op ampâsee Figure
2 for common circuit configurations.
IIN
Current
Input
1000Mâ¦
RF
V+
2kâ¦
18kâ¦
2
7
OPA129
3
5
8
Vâ
6
VO = âIIN ⢠RF
VO = â10V/nA
Output
TESTING
Accurately testing the OPA129 is extremely difficult due to
its high performance. Ordinary test equipment may not be
able to resolve the amplifierâs extremely low bias current.
Inaccurate bias current measurements can be due to:
1. Test socket leakage.
2. Unclean package.
3. Humidity or dew point condensations.
4. Circuit contamination from fingerprints or anti-static
treatment chemicals.
5. Test ambient temperature.
6. Load power dissipation.
7. Mechanical stress.
8. Electrostatic and electromagnetic interference.
FIGURE 4. Current-to-Voltage Converter.
500â¦
9.5kâ¦
Guard V+
8
2
7
OPA129 6
3
5
Vâ
pH Probe
RS â 500Mâ¦
50mV Out
1VDC
Output
FIGURE 5. High Impedance (1015â¦) Amplifier.
(A) Non-Inverting
(B) Buffer
CF 10pF
8
2
3
6 Out
8
2
3
6 Out
In
In
(C) Inverting
In
2
6 Out
3
8
Guard top and bottom of board.
FIGURE 2. Connection of Input Guard.
RF 1011â¦
V+
8
2
7
âQ
OPA129 6
3
Output
VOUT
5
Low frequency cutoff =
Vâ 1/(2ÏRFCF) = 0.16Hz
VOUT = ââQ/CF
FIGURE 6. Piezoelectric Transducer Charge Amplifier.
~1pF to prevent gain peaking
1
8
V+
V0
Vâ
4
5
(A) DIP package
1
8
V+
V0
Vâ
4
5
(B) SOIC package
Connect to proper circuit
node, depending on circuit
configuration (see Figure 2).
Connect to proper circuit
node, depending on circuit
configuration (see Figure 2).
FIGURE 3. Suggested Board Layout for Input Guard.
Pin photodiode
HP 5082-4204
Guard
1010â¦
+15V
8
2
0.1µF
7
OPA129
6
3
5 0.1µF
Output
5 x 109V/W
â15V
Circuit must be well shielded.
FIGURE 7. Sensitive Photodiode Amplifier.
OPA129
7
SBOS026A
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