OPA129UBE4 Datasheet, PDF (7/14 Pages) Texas Instruments – Ultra-Low Bias Current Difet® OPERATIONAL AMPLIFIER

CIRCUIT BOARD LAYOUT
The OPA129 uses a new pinout for ultra low input bias
current. Pin 1 and pin 4 have no internal connection. This
allows ample circuit board space for a guard ring surround-
ing the op amp input pins—even with the tiny SO-8 surface-
mount package. Figure 3 shows suggested circuit board
layouts. The guard ring should be connected to pin 8 (sub-
strate) as shown. It should be driven by a circuit node equal
in potential to the input terminals of the op amp—see Figure
2 for common circuit configurations.
I_IN
Current
Input
1000MΩ
R_F
V+
2kΩ
18kΩ
2
7
OPA129
3
5
8
V–
6
V_O = –I_IN • R_F
V_O = –10V/nA
Output
TESTING
Accurately testing the OPA129 is extremely difficult due to
its high performance. Ordinary test equipment may not be
able to resolve the amplifier’s extremely low bias current.
Inaccurate bias current measurements can be due to:
1. Test socket leakage.
2. Unclean package.
3. Humidity or dew point condensations.
4. Circuit contamination from fingerprints or anti-static
treatment chemicals.
5. Test ambient temperature.
6. Load power dissipation.
7. Mechanical stress.
8. Electrostatic and electromagnetic interference.
FIGURE 4. Current-to-Voltage Converter.
500Ω
9.5kΩ
Guard ^V+
8
2
7
OPA129 ⁶
3
5
V–
pH Probe
R_S ≈ 500MΩ
50mV Out
1VDC
Output
FIGURE 5. High Impedance (10¹⁵Ω) Amplifier.
(A) Non-Inverting
(B) Buffer
C_F 10pF
8
2
3
6 ^Out
8
2
3
6 _Out
In
In
(C) Inverting
In
2
6 ^Out
3
8
Guard top and bottom of board.
FIGURE 2. Connection of Input Guard.
R_F ^1011Ω
V+
8
2
7
∆Q
OPA129 ⁶
3
Output
V_OUT
5
Low frequency cutoff =
V– _{1/(2πRFCF) = 0.16Hz}
V_OUT = –∆Q/C_F
FIGURE 6. Piezoelectric Transducer Charge Amplifier.
~1pF to prevent gain peaking
1
8
V+
V₀
V–
4
5
(A) DIP package
1
8
V+
V₀
V–
4
5
(B) SOIC package
Connect to proper circuit
node, depending on circuit
configuration (see Figure 2).
Connect to proper circuit
node, depending on circuit
configuration (see Figure 2).
FIGURE 3. Suggested Board Layout for Input Guard.
Pin photodiode
HP 5082-4204
Guard
10¹⁰Ω
+15V
8
2
0.1µF
7
OPA129
6
3
5 ^0.1µF
Output
5 x 10⁹V/W
–15V
Circuit must be well shielded.
FIGURE 7. Sensitive Photodiode Amplifier.
OPA129
7
SBOS026A
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