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MSP430X47X3 Datasheet, PDF (7/46 Pages) Texas Instruments – MIXED SIGNAL MICROCONTROLLER
MSP430x47x3, MSP430x47x4
MIXED SIGNAL MICROCONTROLLER
SLAS545 − MAY 2007
MSP430x47xx Terminal Functions (Continued)
TERMINAL
NAME
I/O
NO.
DESCRIPTION
P2.5/
UCA0RXD/UCA0SOMI
74
I/O
General-purpose digital I/O / USCI_A0 receive data input in UART mode, slave out/master in in SPI
mode
P2.4/
UCA0TXD/UCA0SIMO
75
I/O
General-purpose digital I/O / USCI_A0 transmit data output in UART mode, slave in/master out in
SPI mode
P2.3/TB2
76 I/O General-purpose digital I/O / Timer_B3 CCR2. Capture: CCI2A/CCI2B input, compare: Out2 output
P2.2/TB1
77 I/O General-purpose digital I/O / Timer_B3 CCR1. Capture: CCI1A/CCI1B input, compare: Out1 output
P2.1/TB0
78 I/O General-purpose digital I/O / Timer_B3 CCR0. Capture: CCI0A/CCI0B input, compare: Out0 output
P2.0/TA2
79 I/O General-purpose digital I/O / Timer_A Capture: CCI2A input, compare: Out2 output
P1.7/CA1
80 I/O General-purpose digital I/O / Comparator_A input
P1.6/CA0
81 I/O General-purpose digital I/O / Comparator_A input
P1.5/TACLK/
ACLK
General-purpose digital I/O / Timer_A, clock signal TACLK input /
82 I/O ACLK output (divided by 1, 2, 4, or 8)
P1.4/TBCLK/
SMCLK
83
I/O
General-purpose digital I/O / input clock TBCLK—Timer_B3 /
submain system clock SMCLK output
P1.3/TBOUTH/
SVSOUT
84
I/O
General-purpose digital I/O / switch all PWM digital output ports to high impedance—Timer_B3 TB0
to TB2 / SVS: output of SVS comparator
P1.2/TA1
85 I/O General-purpose digital I/O / Timer_A, Capture: CCI1A input, compare: Out1 output
P1.1/TA0/MCLK
General-purpose digital I/O / Timer_A. Capture: CCI0B input / MCLK output.
86 I/O Note: TA0 is only an input on this pin / BSL receive
P1.0/TA0
87 I/O General-purpose digital I/O / Timer_A. Capture: CCI0A input, compare: Out0 output / BSL transmit
XT2OUT
88 O Output terminal of crystal oscillator XT2
XT2IN
89
I Input port for crystal oscillator XT2. Only standard crystals can be connected.
TDO/TDI
90 I/O Test data output port. TDO/TDI data output or programming data input terminal
TDI/TCLK
91
I Test data input or test clock input. The device protection fuse is connected to TDI/TCLK.
TMS
92
I Test mode select. TMS is used as an input port for device programming and test.
TCK
93
I Test clock. TCK is the clock input port for device programming and test.
RST/NMI
94
I Reset input or nonmaskable interrupt input port
P5.0/SVSIN
95 I/O General-purpose digital I/O / analog input to supply voltage supervisor
A3+
(MSP430x47x4 only)
96
I SD16_A positive analog input A3 (see Note 1) − Not connected in MSP430x47x3 devices
A3−
(MSP430x47x4 only)
97
I SD16_A negative analog input A3 (see Note 1) − Not connected in MSP430x47x3 devices
AVSS
DVSS1
AVCC
NOTES:
98
Analog supply voltage, negative terminal.
99
Digital supply voltage, negative terminal.
100
Analog supply voltage, positive terminal. Must not power up prior to DVCC1/DVCC2.
1. Open connection recommended for all unused analog inputs.
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