LM83_15 Datasheet, PDF (7/22 Pages) Texas Instruments – Triple-Diode Input and Local Digital Temperature Sensor with Two-Wire Interface

Logic Electrical Characteristics (Continued)
SMBus DIGITAL SWITCHING CHARACTERISTICS
Unless otherwise noted, these specifications apply for V_CC=+3.0 Vdc to +3.6 Vdc, C_L (load capacitance) on output lines = 80
pF. Boldface
The switching
limits apply for T_A = T_J =
characteristics of the LM83
T_MIN
fully
to T_MAX; all other limits T_A =
meet or exceed the published
Ts_{Jpe=ci+fi2c5a˚tiCo,nsunolef} sthseoSthMerBwuisseornoI₂tCedb. _us.
The
fol-
lowing parameters are the timing relationships between SMBCLK and SMBData signals related to the LM83. They are not the
I²C or SMBus bus specifications.
Symbol
Parameter
Conditions
Typical
Limits
Units
(Note 6)
(Note 7)
(Limit)
f_SMB
SMBus Clock Frequency
100
kHz (max)
10
kHz (min)
t_LOW
SMBus Clock Low Time
10 % to 10 %
1.3
µs (min)
25
ms (max)
t_LOWMEXT
t_HIGH
t_R,SMB
t_F,SMB
t_OF
Cumulative Clock Low Extend Time
SMBus Clock High Time
SMBus Rise Time
SMBus Fall Time
Output Fall Time
t_TIMEOUT
SMBData and SMBCLK Time Low for
Reset of Serial Interface (Note 12)
90 % to 90%
10% to 90%
90% to 10%
C_L = 400 pF,
I_O = 3 mA
10
ms (max)
0.6
µs (min)
1
µs (max)
0.3
ns (max)
250
ns (max)
25
ms (min)
40
ms (max)
t₁
t₂,
t_SU;DAT
t₃,
t_HD;DAT
t₄,
t_HD;STA
t₅,
t_SU;STO
t₆,
t_SU;STA
t_BUF
SMBCLK (Clock) Period
Data In Setup Time to SMBCLK High
Data Out Stable after SMBCLK Low
SMBData Low Setup Time to SMBCLK
Low
SMBData High Delay Time after
SMBCLK High (Stop Condition Setup)
SMBus Start-Condition Setup Time
SMBus Free Time
10
100
300
TBD
100
100
0.6
1.3
µs (min)
ns (min)
ns (min)
ns (max)
ns (min)
ns (min)
µs (min)
µs (min)
SMBus Communication
DS101058-4
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