DRV8837EVM Datasheet, PDF (7/14 Pages) Texas Instruments – LOW-VOLTAGE H-BRIDGE IC

DRV8837
www.ti.com
SLVSBA4A – JUNE 2012 – REVISED AUGUST 2012
VCC and VM may be applied and removed in any order. When VCC is removed, the device enters a low-power
state and draws very little current from VM. If the supply voltage is between 1.8 V and 7 V, VCC and VM may be
connected together.
Protection Circuits
The DRV8837 is fully protected against undervoltage, overcurrent, and overtemperature events.
OVERCURRENT PROTECTION (OCP)
An analog current limit circuit on each FET limits the current through the FET by removing the gate drive. If
this analog current limit persists for longer than the OCP time, all FETs in the H-bridge are disabled. After
approximately 1 ms, the bridge is re-enabled automatically.
Overcurrent conditions on both high- and low-side devices, that is, a short to ground, supply, or across the
motor winding all result in an overcurrent shutdown.
THERMAL SHUTDOWN (TSD)
If the die temperature exceeds safe limits, all FETs in the H-bridge are disabled. Once the die temperature
has fallen to a safe level, operation automatically resumes.
UNDERVOLTAGE LOCKOUT (UVLO)
If at any time the voltage on the VCC pin falls below the undervoltage lockout threshold voltage, all circuitry
in the device is disabled and internal logic is reset. Operation resumes when VCC rises above the UVLO
threshold.
THERMAL INFORMATION
Thermal Protection
The DRV8837 has thermal shutdown (TSD) as described in the Protection Circuits section. If the die temperature
exceeds approximately 150°C, the device is disabled until the temperature drops to a safe level.
Any tendency of the device to enter thermal shutdown is an indication of either excessive power dissipation,
insufficient heatsinking, or too high an ambient temperature.
Power Dissipation
Power dissipation in the DRV8837 is dominated by the power dissipated in the output FET resistance, or r_DS(on).
Average power dissipation can be roughly estimated by:
P_TOT = r _DS(on) ´ (I_OUT(RMS) )²
(1)
where P_TOT is the total power dissipation, r_DS(on) is the resistance of the HS plus LS FETs, and I_OUT(RMS) is the
rms or dc output current being supplied to the load.
The maximum amount of power that can be dissipated in the device is dependent on ambient temperature and
heatsinking.
Note that r_DS(on) increases with temperature, so as the device heats, the power dissipation increases.
Copyright © 2012, Texas Instruments Incorporated
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