DRV8804_15 Datasheet, PDF (7/21 Pages) Texas Instruments – QUAD SERIAL INTERFACE LOW-SIDE DRIVER IC

DRV8804
www.ti.com
SLVSAW4E – JULY 2011 – REVISED JANUARY 2014
FUNCTIONAL DESCRIPTION
Output Drivers
The DRV8804 contains four protected low-side drivers. Each output has an integrated clamp diode connected to
a common pin, VCLAMP.
VCLAMP can be connected to the main power supply voltage, VM. It can also be connected to a zener or TVS
diode to VM, allowing the switch voltage to exceed the main supply voltage VM. This connection can be
beneficial when driving loads that require very fast current decay, such as unipolar stepper motors.
In all cases, the voltage on the outputs must not be allowed to exceed the maximum output voltage specification.
Serial Interface Operation
The DRV8804 is controlled with a simple serial interface. Logically, the interface is shown in Figure 2.
nENBL
LATCH
RESET
SCLK
SDATIN
D
Q
CLR
D
Q
CLR
D
Q
CLR
D
Q
CLR
D
Q
CLR
D
Q
CLR
D
Q
CLR
D
Q
CLR
OUT1
OUT2
OUT3
OUT4
SDATOUT
D
Q
CLR
Figure 2. Serial Interface Operation
Data is shifted into a temporary holding shift register in the part using the SDATIN pin, one bit at each rising
edge of the SCLK pin. Data is simultaneously shifted out of the SDATOUT pin, allowing multiple devices to be
daisy-chained onto one serial port. Note that the SDATOUT pin has a push-pull driver, which can support driving
another DRV8804 SDATIN pin at clock frequencies of up to 1 MHz without an external pullup. A pullup resistor
can be used between SDATOUT and an external 5 V logic supply in order to support higher clock frequencies. A
resistor value greater than 1 kΩ is recommended. The SDATOUT pin is capable of approximately 1-mA source
and 5-mA sink. In order to supply logic signals to a lower-voltage microcontroller, use a resistor divider from
SDATOUT to GND.
A rising edge on the LATCH pin latches the data from the temporary shift register into the output stage.
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