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CD74AC191 Datasheet, PDF (7/10 Pages) Texas Instruments – Presettable Synchronous 4-Bit Binary Up/Down Counter
CD74AC191, CD74ACT191
Switching Specifications Input tr, tf = 3ns, CL = 50pF (Worst Case) (Continued)
-40oC TO 85oC
-55oC TO 125oC
PARAMETER
Propagation Delay
CE to RC
SYMBOL
VCC (V)
MIN
tPLH, tPHL
1.5
-
3.3
4.4
TYP
MAX
MIN
TYP
MAX UNITS
-
137
-
-
151
ns
-
15.4
4.2
-
16.9
ns
5
3.1
-
11
3
-
12.1
ns
Input Capacitance
CI
-
Power Dissipation Capacitance
CPD
-
(Note 14)
-
-
10
-
-
10
pF
-
96
-
-
96
-
pF
ACT TYPES
Propagation Delay
PL to Qn
tPLH, tPHL
5
4.2
(Note 13)
-
14.8
4.1
-
16.3
ns
Propagation Delay
Pn to Qn
tPLH, tPHL
5
3.9
-
13.8
3.8
-
15.2
ns
Propagation Delay
CP to Qn
tPLH, tPHL
5
4.1
-
14.5
4
-
16
ns
Propagation Delay
CP to RC
tPLH, tPHL
5
3.1
-
10.9
3
-
12
ns
Propagation Delay
CP to TC
tPLH, tPHL
5
5.2
-
18.2
5
-
20
ns
Propagation Delay
U/D to RC
tPLH, tPHL
5
5.6
-
19.7
5.4
-
21.7
ns
Propagation Delay
U/D to TC
tPLH, tPHL
5
3.8
-
13.5
3.7
-
14.9
ns
Propagation Delay
CE to RC
tPLH, tPHL
5
3.3
-
11.5
3.2
-
12.7
ns
Input Capacitance
CI
-
Power Dissipation Capacitance
CPD
-
(Note 14)
-
-
10
-
-
10
pF
-
96
-
-
96
-
pF
NOTES:
11. Limits tested 100%.
12. 3.3V Min is at 3.6V, Max is at 3V.
13. 5V Min is at 5.5V, Max is at 4.5V
14. CPD is used to determine the dynamic power consumption per package.
PD = CPDVCC2 fi + (CL + VCC2 fo) where fi = input frequency, fo = output frequency, CL = output load capacitance, VCC = supply voltage.
CP
Qn OR TC
1/fMAX
tW
VS
tPHL
tPLH
VS
INPUT LEVEL
VS
VS
FIGURE 1.
CP OR CE
RC
VS
tPHL
VS
INPUT LEVEL
VS
tPLH
VS
FIGURE 2.
7