TLV320AIC3212_15 Datasheet, PDF (68/78 Pages) Texas Instruments – TLV320AIC3212 Ultra-Low Power Stereo Audio Codec With Receiver Driver, DirectPath Headphone, and Stereo Class-D Speaker Amplifier

TLV320AIC3212
SLAS784A – MARCH 2012 – REVISED SEPTEMBER 2015
www.ti.com
12 Power Supply Recommendations
The TLV320AIC3212 integrates a large amount of digital and analog functionality, and each of these blocks can
be powered separately to enable the system to select appropriate power supplies for desired performance and
power consumption. The device has separate power domains for digital IO, digital core, analog core, analog
input, receiver driver, charge-pump input, headphone driver, and speaker drivers. If desired, all of the supplies
(except for the supplies for speaker drivers, which can directly connect to the battery) can be connected together
and be supplied from one source in the range of 1.65 V to 1.95 V. Individually, the IOVDD voltage can be
supplied in the range of 1.1 V to 3.6 V. For improved power efficiency, the digital core power supply can range
from 1.26 V to 1.95 V. The analog core voltages (AVDD1_18, AVDD2_18, AVDD4_18, and AVDD_18) can range
from 1.5 V to 1.95 V. The microphone bias (AVDD3_33) and receiver driver supply (RECVDD_33) voltages can
range from 1.65 V to 3.6 V. The charge-pump input voltage (CPVDD_18) can range from 1.26 V to 1.95 V, and
the headphone driver supply (HVDD_18) voltage can range from 1.5 V to 1.95 V. The speaker driver voltages
(SLVDD, SRVDD, and SPK_V) can range from 2.7 V to 5.5 V.
For more detailed information see the Application Reference Guide, SLAU360.
13 Layout
13.1 Layout Guidelines
Each system design and PCB layout is unique. The layout should be carefully reviewed in the context of a
specific PCB design. However, the following guidelines can optimize TLV320AIC3212 performance:
• The decoupling capacitors for the power supplies should be placed close to the device terminals. Figure 33
shows the recommended decoupling capacitors for the TLV320AIC3212.
• Place the flying capacitor between CPFCP and CPFCM near the device terminals, with minimal VIAS in the
trace between the device terminals and the capacitor. Similarly, keep the decoupling capacitor on VNEG near
the device terminal with minimal VIAS in the trace between the device terminal, capacitor, and PCB ground.
• TLV320AIC3212 internal voltage references must be filtered using external capacitors. Place the filter
capacitors on VREF_SAR and VREF_AUDIO near the device terminals for optimal performance.
• For analog differential audio signals, the signals should be routed differentially on the PCB for better noise
immunity. Avoid crossing of digital and analog signals to avoid undesirable crosstalk.
• Analog, speaker and digital grounds should be separated to prevent possible digital noise from affecting the
analog performance of the board.
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