TLE207X Datasheet, PDF (68/77 Pages) Texas Instruments – EXCALIBUR LOW-NOISE HIGH-SPEED JFET-INPUT OPERATIONAL AMPLIFIERS

TLE207x, TLE207xA, TLE207xY
EXCALIBUR LOW-NOISE HIGH-SPEED
JFET-INPUT OPERATIONAL AMPLIFIERS
SLOS181A – FEBRUARY 1997 – REVISED MARCH 2000
APPLICATION INFORMATION
input characteristics
The TLE207x, TLE207xA, and TLE207xB are specified with a minimum and a maximum input voltage that if
exceeded at either input could cause the device to malfunction. Because of the extremely high input impedance
and resulting low bias current requirements, the TLE207x, TLE207xA, and TLE207xB are well suited for
low-level signal processing; however, leakage currents on printed-circuit boards and sockets can easily exceed
bias current requirements and cause degradation in system performance. It is good practice to include guard
rings around inputs (see Figure 70). These guards should be driven from a low-impedance source at the same
voltage level as the common-mode input.
VI
+
–
R2
R1
VO
VI
R3
+
+
VO
VO
–
VI
–
R4
+ Where
R3
R4
R2
R1
Figure 70. Use of Guard Rings
TLE2071 input offset voltage nulling
The TLE2071 series offers external null pins that can be used to further reduce the input offset voltage. The
circuit of Figure 71 can be connected as shown if the feature is desired. When external nulling is not needed,
the null pins may be left unconnected.
IN –
–
IN +
+
OUT
N2
N1 _{100 kΩ}
5 kΩ
VCC _–
Figure 71. Input Offset Voltage Nulling
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