TMS470R1VF67A Datasheet, PDF (67/70 Pages) Texas Instruments – 16/32-BIT RISC FLASH MICROCONTROLLER

TMS470R1VF67A
16/32-BIT RISC FLASH MICROCONTROLLER
SPNS004I – NOVEMBER 2002– REVISED SEPTEMBER 2005
List of Figures
Functional Block Diagram
Figure 1. Memory Map
Figure 2. TMS470R1x Family Nomenclature
Figure 3. Test Load Circuit
Figure 4. Crystal/Clock Connection
Figure 5. CLKOUT Timing Diagram
Figure 6. ECLK Timing Diagram
Figure 7. PORRST Timing Diagram
Figure 8.
Figure 9.
Figure 10.
Figure 11.
Figure 12.
Figure 13.
Figure 14.
Figure 15.
Figure 16.
JTAG Scan Timing
CMOS-Level Outputs
CMOS-Level Inputs
SPIn Master Mode External Timing (CLOCK PHASE = 0)
SPIn Master Mode External Timing (CLOCK PHASE = 1)
SPIn Slave Mode External Timing (CLOCK PHASE = 0)
SPIn Slave Mode External Timing (CLOCK PHASE = 1)
MibSPI Master Mode External Timing (CLOCK PHASE = 0)
MibSPI Master Mode External Timing (CLOCK PHASE = 1)
Figure 17. MibSPI Slave Mode External Timing (CLOCK PHASE = 0)
Figure 18. MibSPI Slave Mode External Timing (CLOCK PHASE = 1)
Figure 19. SCIn Isosynchronous Mode Timing Diagram for Internal Clock
Figure 20. SCIn Isosynchronous Mode Timing Diagram for External Clock
Figure 21. C2SIb Timing Diagram
Figure 22. MibADC Input Equivalent Circuit
Figure 23. MibADC Timing Diagram
Figure 24. Differential Nonlinearity (DNL)
Figure 25. Integral Nonlinearity (INL) Error
Figure 26. Absolute Accuracy (Total) Error
Mechanical Data
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