PGA900_15 Datasheet, PDF (60/138 Pages) Texas Instruments – PGA900 Programmable Resistive Sensing Conditioner with Digital and Analog Outputs

PGA900
SLDS209A – JANUARY 2015 – REVISED MAY 2015
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7.3.21.3.4 CRC
The last byte of the EEPROM memory is reserved for the CRC. This CRC value covers all data in the EEPROM
memory. Every time the last byte is programmed, the CRC value is automatically calculated and validated. The
validation process checks the calculated CRC value with the last byte programmed in the EEPROM memory cell.
If the calculated CRC matches the value programmed in the last byte, the CRC_GOOD bit is set in
EEPROM_CRC_STATUS register.
The CRC check can also be initiated at any time by setting the CALCULATE_CRC bit in the EEPROM_CRC
register. The status of the CRC calculation is available in the CRC_CHECK_IN_PROG bit in
EEPROM_CRC_STATUS register, while the result of the CRC validation is available in the CRC_GOOD bit in
EEPROM_CRC_STATUS register.
The CRC calculation pseudo code is as follows:
currentCRC8 = 0xFF; // Current value of CRC8
for NextData
D = NextData;
C = currentCRC8;
begin
nextCRC8_BIT0 = D_BIT7 ^ D_BIT6 ^ D_BIT0 ^ C_BIT0 ^ C_BIT6 ^ C_BIT7;
nextCRC8_BIT1 = D_BIT6 ^ D_BIT1 ^ D_BIT0 ^ C_BIT0 ^ C_BIT1 ^ C_BIT6;
nextCRC8_BIT2 = D_BIT6 ^ D_BIT2 ^ D_BIT1 ^ D_BIT0 ^ C_BIT0 ^ C_BIT1 ^ C_BIT2 ^ C_BIT6;
nextCRC8_BIT3 = D_BIT7 ^ D_BIT3 ^ D_BIT2 ^ D_BIT1 ^ C_BIT1 ^ C_BIT2 ^ C_BIT3 ^ C_BIT7;
nextCRC8_BIT4 = D_BIT4 ^ D_BIT3 ^ D_BIT2 ^ C_BIT2 ^ C_BIT3 ^ C_BIT4;
nextCRC8_BIT5 = D_BIT5 ^ D_BIT4 ^ D_BIT3 ^ C_BIT3 ^ C_BIT4 ^ C_BIT5;
nextCRC8_BIT6 = D_BIT6 ^ D_BIT5 ^ D_BIT4 ^ C_BIT4 ^ C_BIT5 ^ C_BIT6;
nextCRC8_BIT7 = D_BIT7 ^ D_BIT6 ^ D_BIT5 ^ C_BIT5 ^ C_BIT6 ^ C_BIT7;
end
currentCRC8 = nextCRC8_D8;
endfor
NOTE
The EEPROM CRC calculation is complete 340 µs after digital core starts running at
power up. After the CRC calculation completes, the EEPROM_CRC_VALUE contains the
CRC value calculated and CRC_GOOD bit in the EEPROM_CRC_STATUS register
indicates the status of the CRC check.
7.3.21.4 DATA RAM Memory
This memory space is used for M0 scratchpad memory, such as intermediate calculation results. It is a 1 KB
memory space, and located at memory page 1.
7.3.21.5 Control and Status Registers Memory
The M0 uses control and data registers to interact with the analog blocks of the device.
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