TLC1550I Datasheet, PDF (6/9 Pages) Texas Instruments – 10-BIT ANALOG-TO-DIGITAL CONVERTERS WITH PARALLEL OUTPUTS

TLC1550I, TLC1550M, TLC1551I
10-BIT ANALOG-TO-DIGITAL CONVERTERS
WITH PARALLEL OUTPUTS
SLAS043C – MAY 1991 – REVISED MARCH 1995
operating characteristics over recommended operating free-air temperature range with internal
clock and minimum sampling time of 4 µs, V_DD = V_ref+ = 5 V and V_ref– = 0 (unless otherwise noted)
PARAMETER
TLC1550I
TEST CONDITIONS
TA†
Full range
MIN TYP‡ MAX UNIT
± 0.5
EL
Linearity error
TLC1551I
TLC1550M
See Note 3
Full range
25°C
Full range
±1
LSB
± 0.5
±1
TLC1550I
Full range
± 0.5
EZS
Zero-scale error
TLC1551I
TLC1550M
See Notes 2 and 4
Full range
25°C
Full range
±1
LSB
± 0.5
±1
TLC1550I
Full range
± 0.5
EFS
Full-scale error
TLC1551I
TLC1550M
See Notes 2 and 4
Full range
25°C
Full range
±1
LSB
± 0.5
±1
TLC1550I
Full range
± 0.5
Total unadjusted error
TLC1551I
See Note 5
Full range
± 1 LSB
TLC1550M
25°C
±1
tconv Conversion time
fclock(external) = 4.2 MHz or
internal clock
6 µs
ta(D)
tv(D)
tdis(D)
Data access time after RD goes low
Data valid time after RD goes high
Disable time, delay time from RD high to high
impedance
See Figure 3
35 ns
5
ns
30 ns
td(EOC) Delay time, RD low to EOC high
0
15
ns
† _{Full range is – 40°C to 85°C for the TL155xI devices and – 55°C to 125°C for the TLC1550M.}
‡ _{All typical values are at VDD = 5 V, TA = 25°C.}
NOTES: 2. Analog input voltages greater than that applied to REF+ convert to all 1s (1111111111), while input voltages less than that applied
to REF – convert to all 0s (0000000000). The total unadjusted error may increase as this differential voltage falls below 4.75 V.
3. Linearity error is the difference between the actual analog value at the transition between any two adjacent steps and its ideal value
after zero-scale error and full-scale error have been removed.
4. Zero-scale error is the difference between the actual mid-step value and the nominal mid-step value at specified zero scale.
Full-scale error is the difference between the actual mid-step value and the nominal mid-step value at specified full scale.
5. Total unadjusted error is the difference between the actual analog value at the transition between any two adjacent steps and its
ideal value. It includes contributions from zero-scale error, full-scale error, and linearity error.
PARAMETER MEASUREMENT INFORMATION
Output
Under Test
Test Point
CL = 62 pF
Source Current = 6 mA
See Note A
Vcp = 1 V
Sink Current = 6 mA
Vcp = voltage commutation point for switching between source and sink currents
NOTE A: Equivalent load circuit of the Teradyne A500 tester for timing parameter measurement
Figure 1. Test Load Circuit
2–6
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