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THMC40 Datasheet, PDF (6/17 Pages) Texas Instruments – VARIABLE SPEED 12-VDC BRUSHLESS FAN MOTOR DRIVERS
THMC40, THMC41
VARIABLE SPEED 12-VDC BRUSHLESS FAN MOTOR DRIVERS
SLIS097 – MARCH 2000
PRINCIPLES OF OPERATION
general overview
The THMC40 and THMC41 are 2-phase dc brushless fan motor drivers with PWM speed control intended
primarily for applications requiring a wide speed control range and an open-drain tachometer output signal
(THMC40), or a locked rotor detection output (THMC41). The VOUT drive duty cycle, and thus fan speed, is
proportional to the voltage level at the VPWM input terminal. Each device has an internal Hall sensor
comparator/signal conditioner, a low power sleep-state mode, locked rotor protection with automatic restart
after a locked rotor condition, and over-temperature protection. The tachometer signal (THMC40) can be used
to monitor the health of the fan or to close an external loop based on fan RPM. The THMC40 and THMC41
provide a more efficient drive solution to fan RPM control than external linear voltage control. This solution is
also considerably more efficient than controlling dc brushless fan RPM using external PWM drive.
low-side motor phase winding driver outputs (PHA, PHB)
The PHA and PHB outputs provide low-side drive of the motor’s two stator phase windings (see block diagram
and Figure 1). These outputs have a typical RDS(ON) of 400 mΩ at 25°C and a 1-A continuous current rating.
The PHA and PHB outputs have an active flyback clamp (VZCLAMP in Figure 1) of 38 V (typical) to snub inductive
energy when a phase drive switches off. The outputs also have global thermal shutdown to prevent device
failure.
Drive commutation of PHA and PHB outputs is controlled according to rotor position monitored by a Hall-effect
position sensor. Discussion of this function is found in the following section, and the relationship between PHA
and PHB outputs to Hall input signal is shown in Figure 2.
TACH
(THMC40)
Tachometer
Output Driver
VOUT
VPWR
RD
(THMC41)
Naked H+
Hall H–
Sensor
Locked Rotor
Detection and
Auto-Restart
Hall Sensor
Comparator
Low-Side
Gate Drive
Control
Logic, and
Global
Thermal
Shutdown
VZCLAMP
VZCLAMP
SN
PHA
NS
PHB
Figure 1. Low-Side Gate Drive Block Diagram
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