TAS5186 Datasheet, PDF (6/17 Pages) Texas Instruments – 6-Channel, 210-W, Digital-Amplifier Power Stage

TAS5186
SLES136 – MAY 2005
OTW
SD
M1
M2
M3
RESET
FUNCTIONAL BLOCK DIAGRAM
Internal Pullup
Resistors to VREG
Protection
and
I/O Logic
Undervoltage
Protection
Power On
Reset
Temperature
Sense
VREG
Overload
Protection
I_Sense
PWM_F
PWM_E
PWM_D
PWM
Receiver
Control
Timing
Gate
Drive
PWM
Receiver
Control
Timing
Gate
Drive
PWM
Receiver
Control
Timing
Gate
Drive
PWM_C
PWM_B
PWM_A
PWM
Receiver
Control
Timing
Gate
Drive
PWM
Receiver
Control
Timing
Gate
Drive
PWM
Receiver
Control
Timing
Gate
Drive
Control
Timing
Gate
Drive
www.ti.com
VDD
VREG
AGND
GND
OC_ADJ
GVDD_DEF
BST_F
PVDD_F
OUT_F
PGND_EF
BST_E
PVDD_E
OUT_E
PGND_EF
BST_D
PVDD_D
OUT_D
PGND_D
GVDD_ABC
BST_C
PVDD_C
OUT_C
PGND_C
BST_B
PVDD_B
OUT_B
PGND_AB
BST_A
PVDD_A
OUT_A
BST_BIAS
OUT_BIAS
B0034-01
6