TAS3103 Datasheet, PDF (6/146 Pages) Texas Instruments – Digital Audio Processor With 3D Effects

3−10 TAS3103 3D Effects Processing Block . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3−9
3−11 Biquad Filter Structure and Coefficient Subaddress Format . . . . . . . . . . . . 3−10
3−12 Bass and Treble Filter Selections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3−12
3−13 Bass and Treble Application Example—Subaddress Parameters . . . . . . . 3−14
3−14 I²C Bass/Treble Activity Monitor Procedure . . . . . . . . . . . . . . . . . . . . . . . . . 3−16
3−15 Soft Volume and Loudness Compensation Block Diagram . . . . . . . . . . . . . 3−18
3−16 Detailed Block Diagram—Soft Volume and Loudness Compensation . . . 3−25
3−17 Delay Line Memory Implementation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3−27
3−18 Maximum Delay Line Lengths . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3−28
3−19 DRC Positioning in TAS3103 Processing Flow . . . . . . . . . . . . . . . . . . . . . . . 3−29
3−20 Dynamic Range Compression (DRC) Transfer Function Structure . . . . . . 3−30
3−21 DRC Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3−32
3−22 DRC Input Word Structure for 0-dB Channel Processing Gain . . . . . . . . . 3−36
3−23 DRC Transfer Curve—Example 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3−38
3−24 DRC Transfer Curve—Example 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3−40
3−25 DRC Transfer Curve—Example 3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3−42
3−26 DRC Transfer Curve—Example 4 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3−44
3−27 Spectrum Analyzer/VU Meter Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . 3−46
3−28 Logarithmic Number Conversions—Spectrum Analyzer/VU Meter . . . . . . 3−47
3−29 Dither Data Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3−49
3−30 Dither Data Magnitude (Gain = 1.0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3−51
3−31 Triangular Dither Statistics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3−52
3−32 Triangular Dither Statistics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3−53
3−33 Processing Node to Serial Output Port Topology . . . . . . . . . . . . . . . . . . . . . 3−55
3−34 Output Crossbar Mixer Topology . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3−56
4−1 Master Clock Signals Timing Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4−3
4−2 Control Signals Timing Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4−4
4−3 Serial Audio Port Slave Mode Timing Waveforms . . . . . . . . . . . . . . . . . . . . . . 4−5
4−4 TAS3100 Serial Audio Port Master Mode Timing Waveforms . . . . . . . . . . . . . 4−6
4−5 I²C SCL and SDA Timing Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4−8
4−6 I²C Start and Stop Conditions Timing Waveforms . . . . . . . . . . . . . . . . . . . . . . 4−8
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