SN74TVC16222A_07 Datasheet, PDF (6/18 Pages) Texas Instruments – 22-BIT VOLTAGE CLAMP

SN74TVC16222A
22ĆBIT VOLTAGE CLAMP
SCDS087G − APRIL 1999 − REVISED APRIL 2005
APPLICATION INFORMATION
TVC voltage-limiting application
For the voltage-limiting configuration, the common GATE input must be connected to one side (A or B) of any
one of the transistors (see Figure 3). This connection determines the V_BIAS input of the reference transistor. The
V_BIAS input is connected through a pullup resistor (typically 200 kΩ ) to the V_DD supply. A filter capacitor on V_BIAS
is recommended. The opposite side of the reference transistor is used as the reference voltage (V_REF)
connection. The V_REF input must be less than V_DDREF − 1 V to bias the reference transistor into conduction.
The reference transistor regulates the gate voltage (V_GATE) of all the pass transistors. V_GATE is determined by
the characteristic gate-to-source voltage difference (V_GS) because V_GATE = V_REF + V_GS. The low-voltage side
of the pass transistors has a high-level voltage limited to a maximum of V_GATE − V_GS, or V_REF.
VDDREF = 3.3 V
VDPU
Motherboard
Interface
200 kΩ
GATE†
48
B1 (VBIAS)†
47
150 Ω
B2
46
150 Ω
B3
45
150 Ω
B4
44
150 Ω
B23
25
TVC16222A
1
2
3
4
5
24
A1 (VREF)†
A2
A3
A4
A23
Open-Drain
CPU Interface
† _{VREF and VBIAS can be applied to any one of the pass transistors. GATE must be connected externally to VBIAS.}
Figure 3. Typical Application Circuit
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