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PTB78560A_15 Datasheet, PDF (6/27 Pages) Texas Instruments – 30-W, 24-V/48-V INPUT DC/DC CONVERTERS WITH AUTO-TRACK™ SEQUENCING
PTB78560A, PTB78560B
PTB78560C
SLTS249 – JUNE 2005
www.ti.com
PTB78560C ELECTRICAL CHARACTERISTICS
(Unless otherwise stated, TA = 25°C, VI = 24 V, VO = 12 V, CO = 100 µF, and IO = IOmax)
PARAMETER
TEST CONDITIONS
PTB78560C
MIN
TYP
MAX
IO
Output current
Over VI range
VI
Input voltage range
Over IO range
Set-point voltage tolerance
IO Bus
0.1 (1)
18
24
±1 (3)
2.5 (2)
60
Temperature variation
-40°C ≤ TA ≤ 85°C
±0.5
Line regulation
VO
Load regulation
Over VI range
Over IO range
±0.2
±1
±0.4
±1
Total output voltage variation Includes set-point, line, load, –40°C ≤ TA ≤ 85°C
±2
±3 (3)
Adjust range
Over VI range
9
13.2
η
Efficiency
RSET = 9.09 kΩ, VO =12 V
RSET = open, VO = 9 V
88%
86%
VO Ripple (peak-to-peak)
20-MHz bandwidth
1
Transient Response
0.1 A/µs load step,
50% to 100%
IOmax
Recovery time
VO over/undershoot
100
±150
Track input (pin 5)
Input current
Open-circuit voltage
Track connected to -Sense
–0.48
0
VO Bus
Referenced to -VI
Input high voltage (VIH)
2
Open (4)
Output enable inputs (pins 2, 3)
Input low voltage (VIL)
-0.2
0.8
Input low current (IIL)
–0.8
Standby input current
Pins 2 and 3 open
8
16
IO Bus Overcurrent threshold
Shutdown, followed by autorecovery
3.75
UVLO Undervoltage lockout
VI increasing
17
VI decreasing
16
ƒS
Switching frequency
Over VI range
400
500
600
Internal input capacitance
1
External input capacitance
External output capacitance
Isolation voltage
Between +VI and –VI
Between both outputs and VO COM
Input-output
100
100
1,500
1,500
Isolation capacitance
Input-output
2,000
Isolation resistance
Input-output
10
MTBF Reliability
Telcordia SR-332 50% stress, TA = 40°C, ground
benign
3.4
UNIT
A
V
%VO
%VO
%VO
%VO
%VO
V
%VO
µs
mV
mA
V
mA
mA
A
V
kHz
µF
µF
µF
Vdc
pF
MΩ
106 Hrs
(1) The converter requires a minimum load current for proper operation. The converter is not damaged when operated under a no-load
condition.
(2) See temperature derating curves for safe operating area (SOA), to determine output current derating at elevated ambient temperatures.
(3) The set-point voltage tolerance is affected by the tolerance and stability of RSET. The stated limit is unconditionally met if RSET has a
tolerance of 1%, with 100 ppm/°C temperature stability.
(4) The PEN and NEN enable inputs each have an internal pullup resistor. If the enable feature is not used, the PEN input (pin 2) should be
left open circuit and the NEN input (pin 3) permanently connected to –VI. A discrete MOSFET or bipolar transistor is recommended for
the enable control. The open-circuit voltage is less than 10 V. See the Application Information for a more detailed description.
6
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