CD74HC688 Datasheet, PDF (6/7 Pages) Texas Instruments – High Speed CMOS Logic 8-Bit Magnitude Comparator

CD74HC688, CD74HCT688
Switching Specifications Input t_r, t_f = 6ns (Continued)
PARAMETER
TEST
V_CC
SYMBOL CONDITIONS (V)
25^oC
-40^oC TO 85^oC -55^oC TO 125^oC
MIN TYP MAX MIN MAX MIN MAX UNITS
E to Output
t_PLH,
t_PHL
C_L = 50pF
2
-
- 120
-
150
-
180
ns
4.5
-
-
24
-
30
-
36
ns
Output Transition Time
(Figure 1)
C_L =15pF
C_L = 50pF
t_TLH, t_THL C_L = 50pF
5
-
9
-
-
-
-
-
ns
6
-
-
20
-
26
-
30
ns
2
-
-
75
-
95
-
110
ns
4.5
-
-
15
-
19
-
22
ns
6
-
-
13
-
16
-
19
ns
Input Capacitance
Power Dissipation Capacitance
(Notes 4, 5)
C_IN
C_PD
C_L = 50pF
C_L =15pF
-
-
-
10
-
10
-
10
pF
5
-
22
-
-
-
-
-
pF
HCT TYPES
Propagation Delay (Figure 1)
An to Output
Bn to Output
E to Output
Output Transition Time
(Figure 1)
t_PLH,
t_PHL
C_L = 50pF
C_L =15pF
t_PLH,
t_PHL
C_L = 50pF
C_L =15pF
t_PLH,
t_PHL
C_L = 50pF
C_L =15pF
t_TLH, t_THL C_L = 50pF
4.5
-
-
34
-
42
-
51
ns
5
-
14
-
-
-
-
-
ns
4.5
-
-
34
-
42
-
51
ns
5
-
14
-
-
-
-
-
ns
4.5
-
-
24
-
30
-
36
ns
5
-
9
-
-
-
-
-
ns
4.5
-
-
15
-
19
-
22
ns
Input Capacitance
Power Dissipation Capacitance
(Notes 4, 5)
C_IN
C_PD
C_L = 50pF
C_L =15pF
-
-
-
10
-
10
-
10
pF
5
-
22
-
-
-
-
-
pF
NOTES:
4. C_PD is used to determine the dynamic power consumption, per gate.
5. P_D = V_CC2 f_i (C_PD + C_L) where f_i = Input Frequency, C_L = Output Load Capacitance, V_CC = Supply Voltage.
Test Circuit and Waveform
t_r = 6ns
ANY INPUT
A OR B
OUTPUT Y
t_PLH
t_TLH
t_f = 6ns
t_PHL
t_THL
90% ^{INPUT LEVEL}
V_S
10% _GND
V_S
FIGURE 1. PROPAGATION DELAY AMD TRANSITION TIMES
6