CD74HC4060 Datasheet, PDF (6/10 Pages) Texas Instruments – High Speed CMOS Logic 14-Stage Binary Counter with Oscillator

CD74HC4060, CD74HCT4060
DC Electrical Specifications (Continued)
PARAMETER
Low-Level Output
Voltage φO Output
(Pin 10)
TTL Loads
SYMBOL
V_OL
TEST
CONDITIONS
V_I (V)
V_CC or
GND
I_O (mA)
2.6
V_CC
(V)
4.5
25^oC
-40^oC TO 85^oC -55^oC TO 125^oC
MIN TYP MAX MIN MAX MIN MAX UNITS
-
-
0.26
-
0.33
-
0.4
V
High-Level Output
V_OH V_IL or V_IH -3.2
4.5
3.98
-
-
3.84
-
3.7
-
V
Voltage φO Output
(Pin 9)
TTL Loads
Low-Level Output
Voltage φO Output
(Pin 9)
TTL Loads
V_OL V_IH or V_IL 3.2
4.5
-
Note 5
0.26
-
0.33
-
0.4
V
Input Leakage
Current
I_I
Any
0
Voltage
Between
V_CC and
GND
5.5
-
±0.1
-
±1
-
±1
µA
Quiescent Device
Current
I_CC
V_CC or
0
GND
5.5
-
-
8
-
80
-
160
µA
Additional Quiescent
Device Current Per
Input Pin: 1 Unit Load
∆I_CC
(Note 4)
V_CC
-2.1
-
4.5 to
-
100 360
-
450
-
490
µA
5.5
NOTES:
4. For dual-supply systems theoretical worst case (V_I = 2.4V, V_CC = 5.5V) specification is 1.8mA.
5. For pin 11 V_IH = 3.15V, V_IL = 0.9V.
6. Limits not valid when pin 12 (instead of pin 11) is used as control input.
HCT Input Loading Table
INPUT
UNIT LOADS
MR
0.35
NOTE: Unit Load is ∆I_CC limit
tions Table, e.g. 360µA max at
specified
25^oC.
in
DC
Electrical
Specifica-
Prerequisite for Switching Specifications
PARAMETER
HC TYPES
Maximum Input Pulse
Frequency
Input Pulse Width
Reset Removal Time
SYMBOL V_CC (V) MIN
t_MAX
t_W
t_REM
2
6
4.5
30
6
35
2
80
4.5
16
6
14
2
100
4.5
20
6
17
25^oC
TYP
-
-
-
-
-
-
-
-
-
MAX
-
-
-
-
-
-
-
-
-
-40^oC TO 85^oC
MIN TYP MAX
5
-
-
25
-
-
29
-
-
100
-
-
20
-
-
17
-
-
125
-
-
25
-
-
21
-
-
-55^oC TO 125^oC
MIN TYP MAX UNITS
4
-
20
-
23
-
120
-
24
-
20
-
150
-
30
-
26
-
-
MHz
-
MHz
-
MHz
-
ns
-
ns
-
ns
-
ns
-
ns
-
ns
6