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CD54HC132_08 Datasheet, PDF (6/14 Pages) Texas Instruments – High-Speed CMOS Logic Quad 2-Input NAND Schmitt Trigger
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CD54HC132, CD74HC132, CD54HCT132, CD74HCT132
Test Circuits and Waveforms
tr = 6ns
INPUT
90%
50%
10%
tf = 6ns
VCC
GND
tTHL
INVERTING
OUTPUT
tPHL
tTLH
90%
50%
10%
tPLH
FIGURE 1. HC AND HCU TRANSITION TIMES AND PROPAGA-
TION DELAY TIMES, COMBINATION LOGIC
tr = 6ns
INPUT
2.7V
1.3V
0.3V
tf = 6ns
3V
GND
tTHL
INVERTING
OUTPUT
tPHL
tTLH
90%
1.3V
10%
tPLH
FIGURE 2. HCT TRANSITION TIMES AND PROPAGATION
DELAY TIMES, COMBINATION LOGIC
VO
VH
VH
=
V+T
-
V
-
T
Vl
V
-
T
V
+
T
V
+
T
VCC
Vl
V
-
T
VH
GND
VCC
VO
VCC
GND
Vl
VO
FIGURE 3. HYSTERESIS DEFINITION, CHARACTERISTIC, AND TEST SET-UP
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