BQ24075T Datasheet, PDF (6/29 Pages) Texas Instruments – 1.5A USB-Friendly Li-Ion Battery Charger and Power-Path Management IC

bq24075T
bq24079T
SLUS937 – DECEMBER 2009
DEVICE INFORMATION
PIN DIAGRAM
Pin out designations are not final. Subject to change.
TS ₁
BAT 2
BAT 3
CE 4
bq24075T
bq24079T
12 ILIM
11 OUT
10 OUT
9 CHG
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NAME
TS
BAT
CE
EN2
EN1
PGOOD
VSS
CHG
OUT
ILIM
IN
TMR
NO.
1
2,3
4
5
6
7
8
9
10,11
12
13
14
TERMINAL FUNCTIONS
I/O
DESCRIPTION
I/O External NTC Thermistor Input. Connect the TS input to the center tap of a resistor divider from V_IN to GND
with the NTC in parallel with the bottom resistor to monitor the NTC in the battery pack. For applications
that do not utilize the TS function, set the resistor divider to be a 20% ratio. See the Battery Pack
Temperature Monitoring section for details on calculating the resistor values.
I/O Charger Power Stage Output and Battery Voltage Sense Input. Connect BAT to the positive terminal of the
battery. Bypass BAT to VSS with a 4.7μF to 47μF ceramic capacitor.
I Charge Enable Active-Low Input. Connect CE to a high logic level to place the battery charger in standby
mode. In standby mode, OUT is active and battery supplement mode is available. Connect /CE to a low
logic level to enable the battery charger. CE is internally pulled down with ~285kΩ. Do not leave CE
unconnected to ensure proper operation.
I Input Current Limit Configuration Inputs. Use EN1 and En2 to control the maximum input current and
I
enable USB compliance. See Table 1 for the description of the operation states. EN1 and EN2 are
internally pulled down with ~285kΩ. Do not leave EN1 or EN2 unconnected to ensure proper operation.
O Open-Drain Power Good Status Indication Output. PGOOD pulls to VSS when a valid input source is
detected. PGOOD is high-impedance when the input power is not within specified limits. Connect PGOOD
to the desired logic voltage rail using a 1kΩ to 100kΩ resistor, or use with an LED for visual indication.
– Ground. Connect to the thermal pad and to the ground rail of the circuit.
O Open-Drain Charging Status Indication Output. CHG pulls to VSS when the battery is charging. CHG is
high-impedance when charging is complete or when the charger is disabled. CHG flashes to indicate a
timer fault. Connect CHG to the desired logic voltage rail using a 1kΩ to 100kΩ resistor, or use with an
LED for visual indication.
O System Supply Output. OUT provides a regulated output when the input is below the OVP threshold and
above the regulation voltage. When the input is out of the operation range, OUT is connected to VBAT
except when SYSOFF is high. Connect OUT to the system load. Bypass OUT to VSS with a 4.7μF to 47μF
ceramic capacitor.
O Adjustable Current Limit Programming Input. Connect a 1.07kΩ to 7.5kΩ resistor from ILIM to VSS to
program the maximum input current (EN2=1, EN1=0). The input current includes the system load and the
battery charge current. Leaving ILIM unconnected disables all charging.
I Input Power Connection. Connect IN to the external DC supply (AC adapter or USB port). The input
operating range is 4.35V to 6.6V. The input accepts voltages up to 26V without damage, but operation is
suspended. Bypass IN to VS with a 1μF to 10μF ceramic capacitor.
O Timer Programming Input. TMR controls the pre-charge and fast-charge safety timers. Connect TMR to
VSS to disable all safety timers. Connect a 18kΩ to 72kΩ resistor between TMR and VSS to program the
timers to a desired length. Leave TMR unconnected to set the timers to the default values.
6
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