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BQ20Z40-R1 Datasheet, PDF (6/16 Pages) Texas Instruments – SBS 1.1-COMPLIANT GAS GAUGE ENABLED WITH IMPEDANCE TRACK™ TECHNOLOGY FOR USE WITH THE bq29330
bq20z40-R1
SLUS993 – DECEMBER 2009
DATA FLASH MEMORY CHARACTERISTICS (continued)
VCC = 2.4 V to 2.6 V, TA = –40°C to 85°C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
Flash programming write-cycles
See (1)
t(WORDPROG) Word programming time
I(DDdPROG) Flash-write supply current
See (1)
See (1)
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MIN
20,000
TYP MAX UNIT
Cycles
2 ms
5
10 mA
SMBus TIMING SPECIFICATIONS
VCC = 2.4 V to 2.6 V, TA = –40°C to 85°C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN TYP MAX UNIT
fSMB
fMAS
tBUF
tHD:STA
tSU:STA
tSU:STO
tHD:DAT
SMBus operating frequency
SMBus master clock frequency
Bus free time between start and stop
Hold time after (repeated) start
Repeated start setup time
Stop setup time
Data hold time
Slave mode, SMBC 50% duty cycle
Master mode, no clock low slave extend
Receive mode
Transmit mode
10
51.2
4.7
4
4.7
4
0
300
100
kHz
μs
ns
tSU:DAT
Data setup time
250
tTIMEOUT Error signal/detect
See (1)
25
tLOW
Clock low period
4.7
tHIGH
Clock high period
See (2)
4
tLOW:SEXT Cumulative clock low slave extend time
See (3)
tLOW:MEXT Cumulative clock low master extend time
See (4)
tF
Clock/data fall time
(VILMAX – 0.15 V) to (VIHMIN + 0.15 V)
tR
Clock/data rise time
0.9 VCC to (VILMAX – 0.15 V)
35 ms
μs
50
25
ms
10
300
ns
1000
(1) The bq20z40-R1 times out when any clock low exceeds tTIMEOUT.
(2) tHIGH:MAX. is minimum bus idle time. SMBC = 1 for t > 50 μs causes reset of any transaction involving the bq20z40-R1 that is in
progress.
(3) tLOW:SEXT is the cumulative time a slave device is allowed to extend the clock cycles in one message from initial start to the stop.
(4) tLOW:MEXT is the cumulative time a master device is allowed to extend the clock cycles in one message from initial start to the stop.
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