BQ2005 Datasheet, PDF (6/16 Pages) Texas Instruments – Fast-Charge IC for Dual-Battery Packs

bq2005
battery chemistries that have a tendency to terminate
charge prior to reaching full capacity. With top-off en-
abled, charging continues at a reduced rate after
fast-charge termination for a period of time selected
by the TM1 and TM2 input pins. (See Table 2.) During
top-off, the CC pin is modulated at a duty cycle of 4s
active for every 30s inactive. This modulation results
in an average rate 1/8th that of the fast charge rate.
Maximum voltage, time, and temperature are the only
termination methods enabled during top-off.
Pulse-Trickle Charge
selected), and then maintenance charging on both. If
only battery A is present, the charge cycle begins on A
and continues until fast charge termination even if a
battery is inserted in channel B in the meantime. A
new battery insertion in channel B while A is in the
top-off phase terminates top-off on A and begins a new
charge cycle on B. If A is configured for or commanded
to discharge-before-charge, the discharge may take
place while channel B is the active charging channel.
When the discharge is complete, if B is still the active
channel battery A enters the Charge Pending state until
A becomes the active channel.
Pulse-trickle charging follows the fast charge and op-
tional top-off charge phases to compensate for self-
discharge of the battery while it is idle in the charger.
The configured pulse-trickle rate is also applied in the
charge pending state to raise the voltage of an over-
discharged battery up to the minimum required before
fast charge can begin.
In the pulse-trickle mode, MOD is active for 260µs of a
period specified by the settings of TM1 and TM2. See Ta-
ble 1. The resulting trickle-charge rate is C/64 when
top-off is enabled and C/32 when top-off is disabled. Both
pulse trickle and top-off may be disabled by tying TM1
and TM2 to VSS.
Charge Status Indication
Charge status is indicated by the CHG output. The
state of the CHG output in the various charge cycle
phases is shown in Figure 4 and illustrated in Figure 2.
Temperature status is indicated by the TEMP output.
TEMP is in the high state whenever VTEMP is within the
temperature window defined by the VLTF and VHTF tem-
perature limits, and is low when the battery tempera-
ture is outside these limits.
In all cases, if VCELL exceeds the voltage at the MCV
pin, both CHG and TEMP outputs are held high regard-
less of other conditions. CHG and TEMP may both be used
to directly drive an LED.
Charge Current Control
The bq2005 controls charge current through the MODA,B out-
put pin. The current control circuitry is designed to sup-
port implementation of a constant-current switching regu-
lator or to gate an externally regulated current source.
When used in switch mode configuration, the nominal
regulated current is:
IREG = 0.225V/RSNS
Charge current is monitored at the SNSA,B input by the
voltage drop across a sense resistor, RSNS, between the
low side of the battery pack and ground. RSNS is sized to
provide the desired fast charge current.
If the voltage at the SNSA,B pin is less than VSNSLO, the
MODA,B output is switched high to pass charge current to
the battery.
When the SNSA,B voltage is greater than VSNSHI, the
MODA,B output is switched low—shutting off charging
current to the battery.
VSNSLO = 0.04 ∗ VCC ± 25mV
VSNSHI = 0.05 ∗ VCC ± 25mV
When used to gate an externally regulated current
source, the SNSA,B pin is connected to VSS, and no sense
resisitor is required.
Pack Sequencing
If both batteries A and B are present when a new charge
cycle is started, the charge cycle starts on battery B and
B remains the active channel until fast charge termina-
tion. Then battery A will be fast charged, followed by a
top-off phase on B (if selected), a top-off phase on A (if
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