TPS53647_15 Datasheet, PDF (57/122 Pages) Texas Instruments – TPS53647 4-Phase, D-CAP+, Step-Down, Buck Controller with NVM and PMBus Interface for ASIC Power and High-Current Point-of-Load

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7.6.2.3.22 VIN_OV_FAULT_LIMIT (55h)
TPS53647
SLUSC39 – JUNE 2015
Format
Description
Default
15
7
Linear
The VIN_OV_FAULT_LIMIT command sets the value of the input voltage that
causes an input overvoltage fault condition. The default value is 17 V in NVM
mode and 14 V in pinstrap mode. Upon triggering an input voltage fault, the
following actions are taken:
• Sets the OTHER bit in the STATUS_BYTE,
• Sets the INPUT bit in the upper byte of the STATUS_WORD,
• Sets the VIN_OV_FAULT bit in the STATUS_INPUT register, and
• The device notifies the host (asserts PMB_ALERT).
0011h
Figure 57. VIN_OV_FAULT_LIMIT Register
14
13
12
11
VIN_OVF_EXPONENT
R/W
6
5
4
3
VIN_OVF_MANTISSA
R/W
10
9
8
VIN_OVF_MANTISSA
R/W
2
1
0
Bit
15:11
10:0
Table 29. VIN_OV_FAULT_LIMIT Register Field Descriptions
Field
VIN_OVF_EXPONENT
VIN_OVF_MANTISSA
Type
R/W
R/W
Reset
0000 0
000 0001 0001
NVM
—
—
Description
5-bit, two's complement exponent (scaling factor).
11-bit, two's complement mantissa.
After a STORE_DEFAULT_ALL command, the controller reads the last two LSB of VIN_OV_FAULT_LIMIT and
convert to decimal, and then adds 14 and converts to save into the VIN_OV_FAULT_LIMIT register. For
example, when the two LSB are 01b, after STORE_DEFAULT_ALL command, the VIN_OV_FAULT_LIMIT reads
000Fh (15 V).
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