TMS320C6412 Datasheet, PDF (57/159 Pages) Texas Instruments – Signal Processor

Device Configurations
2.5 Device Status Register Description
The device status register depicts the status of the device peripheral selection. For the actual register bit
names and their associated bit field descriptions, see Figure 2−4 and Table 2−7.
31
23
15
14
13
Reserved
R-0
Reserved
R-0
Reserved
R-0
12
11
MAC_EN
R-x
10
HPI_WIDTH
R-x
9
PCI_EEAI
R-x
24
16
8
PCI_EN
R-x
7
Reserved
R-x
6
CLKMODE1
R-x
5
CLKMODE0
R-x
4
LENDIAN
R-x
Legend: R = Read only; R/W = Read/Write; -n = value after reset
3
BOOTMODE1
R-x
2
BOOTMODE0
R-x
1
0
AECLKINSEL1 AECLKINSEL0
R-x
R-x
Figure 2−4. Device Status Register (DEVSTAT) Description − 0x01B3 F004
BIT
31:12
11
10
9
8
7
Table 2−7. Device Status (DEVSTAT) Register Selection Bit Descriptions
NAME
Reserved
DESCRIPTION
Reserved. Read-only, writes have no effect.
MAC_EN
EMAC enable bit.
Shows the status of whether EMAC peripheral is enabled or disabled (default).
0 = EMAC is disabled, and the module is powered down (default).
1 = EMAC is enabled.
This bit has no effect if the PCI peripheral is enabled (PCI_EN = 1).
HPI_WIDTH
HPI bus width control bit.
Shows the status of whether the HPI bus operates in 32-bit mode or in 16-bit mode (default).
0 = HPI operates in 16-bit mode. (default).
1 = HPI operates in 32-bit mode.
PCI EEPROM auto-initialization bit (PCI auto-initialization via external EEPROM).
Shows the status of whether the PCI module initializes internal registers via external EEPROM or if the
internal PCI default values are used instead (default).
PCI_EEAI
0 = PCI auto-initialization through EEPROM is disabled; the PCI peripheral uses the specified
PCI default values (default).
1 = PCI auto-initialization through EEPROM is enabled; the PCI peripheral is configured
through EEPROM provided the PCI peripheral pin is enabled (PCI_EN = 1).
PCI_EN
PCI enable bit.
Shows the status of whether the PCI peripheral is enabled or disabled (default).
0 = PCI disabled. (default).
1 = PCI enabled.
Reserved
Global select for the PCI vs. HPI/EMAC/MDIO/GPIO peripherals.
Reserved. Read-only, writes have no effect.
April 2003 − Revised June 2004
SPRS219D
57