TAS5760L_15 Datasheet, PDF (54/77 Pages) Texas Instruments – TAS5760L General-Purpose I2S Input Class-D Amplifier

TAS5760L
SLOS782B – JULY 2013 – REVISED SEPTEMBER 2015
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2. Pull SPK_SLEEP/ADR HIGH
3. Pull SPK_SD LOW
4. The clocks can now be stopped and the power supplies brought down
5. The device is now fully shutdown and powered off
10.2.6.2.3 Digital I/O Connectivity
The digital I/O lines of the TAS5760L are described in previous sections. As discussed, whenever a static digital
pin (that is a pin that is hardwired to be HIGH or LOW) is required to be pulled HIGH, it should be connected to
DVDD through a pullup resistor in order to control the slew rate of the voltage presented to the digital I/O pins. It
is not, however, necessary to have a separate pullup resistor for each static digital I/O line. Instead, a single
resistor can be used to tie all static I/O lines HIGH to reduce BOM count. For instance, if Software Control Mode
is desired both the GAIN[1:0] and the PBTL/SCL pins can both be pulled HIGH through a single pullup resistor.
10.2.6.3 Application Curve
Table 20. Relevant Performance Plots
PLOT TITLE
Figure 1. Output Power vs PVDD
Figure 2. THD+N vs Frequency With PVDD = 12 V, P_OSPK = 1 W
Figure 4. Idle Channel Noise vs PVDD
Figure 5. THD+N vs Output Power With PVDD = 12 V, Both Channels Driven
Figure 7. Efficiency vs Output Power
Figure 8. Crosstalk vs Frequency
Figure 22. PVDD PSRR vs Frequency
Figure 10. DVDD PSRR vs Frequency
Figure 11. Idle Current Draw vs PVDD (Filterless)
Figure 12. Idle Current Draw vs PVDD (With LC Filter as Shown on the EVM)
Figure 13. Shutdown Current Draw vs PVDD (Filterless)
Figure 14. Output Power vs PVDD
Figure 15. THD+N vs Frequency With PVDD = 12 V, P_OSPK = 1 W
Figure 17. Idle Channel Noise vs PVDD
Figure 18. THD+N vs Output Power With PVDD = 12 V, Both Channels Driven
Figure 7. Efficiency vs Output Power
Figure 21. Crosstalk vs Frequency
Figure 22. PVDD PSRR vs Frequency
Figure 23. Idle Current Draw vs PVDD (Filterless)
Figure 24. Idle Current Draw vs PVDD (With LC Filter as Shown on EVM)
Figure 25. Shutdown Current Draw vs PVDD (Filterless)
PLOT NUMBER
G001
G024
G026
G027
G030
G031
G019
G020
G042
G023
G022
G039
G002
G006
G008
G014
G018
G019
G045
G044
G022
54
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