TMS416169 Datasheet, PDF (51/67 Pages) Texas Instruments – 1048576-WORD BY 16-BIT EXTENDED DATA OUT HIGH-SPEED DRAMS

TMS55160, TMS55161, TMS55170, TMS55171
262144 BY 16-BIT MULTIPORT VIDEO RAMS
PARAMETER MEASUREMENT INFORMATION
tw(RL)P
SMVS464 – MARCH 1996
tw(RH)
RAS
td(RLCL)
td(CHRL)
tw(CL)
tw(CH)
td(CLRH)
tt
CASx
tsu(RA)
td(RLCA)
td(RLCH)
tsu(CA)
th(RA)
th(RLCA)
th(CLCA)
tc(P)
td(CACH)
td(CARH)
A0 – A8
Row
Column
Column
DSF
tsu(SFR)
th(SFR)
td(CLGH)
TRG
tsu(TRG)
th(TRG)
tsu(WMR)
tsu(rd)
th(RHrd)
WE
td(DGL)
DQ0 –
DQ15
Data In
ta(CA)
ta(G)
ta(R)
ta(C)
Data Out
ta(CA)
ta(CP)
tdis(G)
Data Out
td(DCL)
tdis(CH)
NOTE A: A write cycle or a read-modify-write cycle can be mixed with the read cycles as long as the write and read-modify-write timing
specifications are not violated and the proper state of DSF is latched on the falling edge of RAS and CASx to select the desired write
mode (normal, block write, etc.).
Figure 42. Enhanced-Page-Mode Read-Cycle Timing (TMS551x0)
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