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TMS320C5535 Datasheet, PDF (51/152 Pages) Texas Instruments – Fixed-Point Digital Signal Processors
TMS320C5535
TMS320C5534, TMS320C5533, TMS320C5532
www.ti.com
SPRS737 – AUGUST 2011
Table 3-16. Reserved and No Connects Terminal Functions
SIGNAL
NAME
RSV0
RSV1
RSV2
RSV3
RSV4
RSV5
RSV6
RSV7
RSV8
RSV9
RSV10
RSV11
RSV12
NO.
TYPE (1)
(2)
OTHER (3) (4)
DESCRIPTION
Reserved
A12
I
–
LDOI
Reserved. For proper device operation, this pin must be tied directly to VSS.
K12 PWR
L13 PWR
B12
I
–
LDOI
Reserved. For proper device operation, this pin must be tied directly to CVDD.
Reserved. For proper device operation, this pin must be tied directly to CVDD.
Reserved. For proper device operation, this pin must be tied directly to VSS.
A11
I
–
LDOI
Reserved. For proper device operation, this pin must be tied directly to VSS.
B11
I
–
LDOI
Reserved. For proper device operation, this pin must be tied directly to VSS.
B13
I
E1
I
–
LDOI
Reserved. For proper device operation, this pin must be directly tied to either VSS or
LDOI, or tied via a 10-kΩ resistor to either VSS or LDOI.
Reserved. (Leave unconnected, do not connect to power or ground).
F1
I
Reserved. (Leave unconnected, do not connect to power or ground).
G1
I
Reserved. (Leave unconnected, do not connect to power or ground).
H1
I
Reserved. (Leave unconnected, do not connect to power or ground).
E2
I
Reserved. (Leave unconnected, do not connect to power or ground).
G2
I
Reserved. (Leave unconnected, do not connect to power or ground).
(1) I = Input, O = Output, Z = High impedance, S = Supply voltage, GND = Ground, A = Analog signal, BH = Bus Holder
(2) Input pins of type I, I/O, and I/O/Z are required to be driven at all times. To achieve the lowest power, these pins must not be allowed to
float. When configured as input or high-impedance state, and not driven to a known state, they may cause an excessive IO-supply
current. If this is the case, enable IPD/IPU, if applicable, or externally terminate the pins.
(3) IPD = Internal pulldown, IPU = Internal pullup. For more detailed information on pullup/pulldown resistors and situations where external
pullup/pulldown resistors are required, see Section 4.8.1, Pullup/Pulldown Resistors.
(4) Specifies the operating I/O supply voltage for each signal
SIGNAL
NAME (5)
NO.
F2
H2
D3
G3
M6
CVDD
M9
N9
C11
D11
K11
Table 3-17. Supply Voltage Terminal Functions
TYPE (1)
(2)
OTHER (3) (4)
DESCRIPTION (5)
SUPPLY VOLTAGES
PWR
1.05-V Digital Core supply voltage (50 MHz)
1.3-V Digital Core supply voltage (100 MHz)
(1) I = Input, O = Output, Z = High impedance, S = Supply voltage, GND = Ground, A = Analog signal, BH = Bus Holder
(2) Input pins of type I, I/O, and I/O/Z are required to be driven at all times. To achieve the lowest power, these pins must not be allowed to
float. When configured as input or high-impedance state, and not driven to a known state, they may cause an excessive IO-supply
current. If this is the case, enable IPD/IPU, if applicable, or externally terminate the pins.
(3) IPD = Internal pulldown, IPU = Internal pullup. For more detailed information on pullup/pulldown resistors and situations where external
pullup/pulldown resistors are required, see Section 4.8.1, Pullup/Pulldown Resistors.
(4) Specifies the operating I/O supply voltage for each signal
(5) USB signal does not apply to TMS320C5532.
Copyright © 2011, Texas Instruments Incorporated
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