TAS5508A Datasheet, PDF (50/99 Pages) Texas Instruments – 8 Channel Digital Audio PWM Processor

TAS5508A Controls and Status
2.4.1 PLL Operation
The TAS5508A uses two internal clocks generated by two internal phase-locked loops (PLLs), the digital PLL
(DPLL) and the analog PLL (APLL). The analog PLL provides the reference clock for the PWM. The digital
PLL provides the reference clock for the digital audio processor and the control logic.
The master clock MCLK input provides the input reference clock for the APLL. The external 13.5-MHz crystal
provides the input reference clock for the digital PLL. The crystal provides a time base to support a number
of operations, including the detection of the MCLK ratio, the data rate, and clock error conditions. The crystal
time base provides a constant rate for all controls and signal timing.
Even if MCLK is not present, the TAS5508A can receive and store I²C commands and provide status.
2.5 Bank Controls
The TAS5508A permits the user to specify and assign sample rate dependent parameters for Biquad,
Loudness, DRC, and Tone in one of three banks that can be manually selected or selected automatically
based upon the data sample rate. Each bank can be enabled for one or more specific sample rates via I²C
bank control register 0x40. Each bank set holds the following values:
• Coefficients for Seven Biquads (7X5 = 35 coefficients) for Each of the Eight Channels (Registers 0X51
– 0x88)
• Coefficients for One Loudness Biquad (Register 0x95)
• DRC1 Energy and (1 – Energy) Values (Register 0x98)
• DRC1 Attack, (1 − Attack), Decay, (1 – Decay) Values (Register 0x9C)
• DRC2 Energy and (1 – Energy) Values (Register 0x9D)
• DRC2 Attack, (1 − Attack), Decay, (1 – Decay) Values (Register 0xA1)
• Five Bass Filter-Set Selections (Register 0xDA)
• Five Treble Filter-Set Selections (Register 0xDC)
The default selection for bank control is manual bank with bank 1 selected. Note that if bank switching is used,
Bank 2 and Bank 3 must be programmed on power−up since the default values are all zeroes. If bank switching
is used and Bank 2 and Bank 3 are not programmed correctly, then the output of the TAS5508A could be muted
when switching to those banks.
2.5.1 Manual Bank Selection
The three bank selection bits of the bank control register allow the appropriate bank to be manually selected
(000 = Bank 1, 001 = Bank 2, 010 = Bank 3). In the manual mode, when a write occurs to the Biquad, DRC,
or Loudness coefficients, the current selected bank is updated. If audio data is streaming to the TAS5508A,
during a manual bank selection, the TAS5508A first performs a mute sequence, then performs the bank
switch, and finally restores the volume using an un−mute sequence.
A mute command initiated by the bank switch mute sequence overrides an un−mute command or a volume
command. While a mute is active, the commanded channels are muted. When a channel is unmated, the
volume level goes to the last commanded volume setting that has been received for that channel.
If MCLK or SCLK is stopped, the TAS5508A performs a bank switch operation. If the clocks should start up
once the manual bank switch command has been received, the bank switch operation is performed during
the 5−ms silent start sequence.
2.5.2 Automatic Bank Selection
To enable automatic bank selection, a value of 3 is written into in the bank selection bits of the bank control
register. Banks are associated with one or more sample rates by writing values into the Bank 1 or Bank 2 data
rate selection registers. The automatic base selection is performed when a frequency change is detected
according to the following scheme:
42 TAS5508A
SLES119 − September 2004