TPS79733-EP Datasheet, PDF (5/16 Pages) Texas Instruments – ULTRA LOW-POWER, 10 mA, LDO LINEAR REGULATORS WITH POWER GOOD OUTPUT

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TPS797xx PG TIMING DIAGRAM
V_IN
V_min
(see Note A)
V_OUT
Threshold
Voltage
PG
Output
V_{IT +}
(see Note B)
TPS79718-EP, TPS79730-EP, TPS79733-EP
SGLS348A – AUGUST 2006 – REVISED OCTOBER 2007
t
V_{IT −}
(see Note B)
t
t
A. V_min = V_OUT + V_DO
B. The PG trip voltage is typically 10% lower than the output voltage (90%V_O). V_IT- to V_IT+ is the hysteresis voltage.
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Product Folder Link(s): TPS79718-EP TPS79730-EP TPS79733-EP