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SN75LVCP412A Datasheet, PDF (5/26 Pages) Texas Instruments – Two Channel SATA 3-Gbps Redriver
www.ti.com
DEVICE IMPLEMENTATION
10 nF
10 nF
10 nF
10 nF
1 RX1P
2 RX1N
15
TX1P
TX1N 14
3 LVCP412A RTJ 13
4 TX2N
RX2N 12
5 TX2P
RX2P 11
10 nF
10 nF
10 nF
10 nF
SN75LVCP412A
SLLS991 – DECEMBER 2009
3.3 V
eSATA
Connector
A+
A-
B-
B+
GPIO
A. Place supply capacitors close to the pin.
B. EN can be left open or tied to supply when no external control is implemented.
C. Output pre-emphasis (PE1, PE2) is shown enabled. Setting depends on device palcement relative to eSATA
connector.
DETAILED DESCRIPTION
INPUT EQUALIZATION
Each differential input of the SN75LVCP412A has +7 dB of fixed equalization in its front stage. The equalization
amplifies high frequency signals to correct for loss from the transmission channel. The input equalizer is
designed to recover a signal even when no eye is present at the receiver and effectively supports FR4 trace at
the input anywhere from <4 inches to 20 inches or <10 cm to >50 cm.
OUTPUT PRE-EMPHASIS
The SN75LVCP412A provides single step pre-emphasis from 0 dB to 2.5 dB at each of its differential outputs.
Pre-emphasis is controlled independently for each channel and is set by the control pins PE1 and PE2 as shown
in the terminal functions table. The pre-emphasis duration is 0.7 UI or 133 ps (typ) at SATA 3-Gbps speed.
LOW POWER MODE
Long battery life has become the single most important differentiator for mobile platforms. The SN75LVCP412A
supports this emphasis on low system power by offering the choice of two low power modes, one requires
control by SATA host (option 1) and the second (option 2) is completely autonomous whereby the
SN75LVCP412A goes into ultra low power mode (<20mW) on its own when no data traffic is detected for longer
than 10us. Both low power modes are described below:
• Standby Mode (option 1) (triggered by EN pin when EN = H → L)
– Standby mode is controlled by the enable (EN) pin. In its default state this pin is internally pulled high.
Pulling this pin LOW puts the device in standby mode within 2μs (max). In this mode all active
components of the device are driven to their quiescent level and differential outputs are driven to Hi-Z
(open). Max power dissipation is 2 mW. Exiting to normal operation requires a maximum latency of 20 μs.
• Auto Low Power Mode (option 2) (triggered when a given channel is in the electrical idle state for > 10 μs and
EN = H)
– The device enters and exits low power mode by actively monitoring the input signal (VIDp-p) level on each
Copyright © 2009, Texas Instruments Incorporated
Product Folder Link(s): SN75LVCP412A
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