SN74AHC1G125_10 Datasheet, PDF (5/14 Pages) Texas Instruments – SINGLE BUS BUFFER GATE WITH 3-STATE OUTPUT

From Output
Under Test
CL
(see Note A)
SN74AHC1G125
SINGLE BUS BUFFER GATE
WITH 3ĆSTATE OUTPUT
SCLS377J − AUGUST 1997 − REVISED JUNE 2005
PARAMETER MEASUREMENT INFORMATION
Test
Point
From Output
Under Test
CL
(see Note A)
RL = 1 kΩ ^S1
VCC
Open
GND
TEST
tPLH/tPHL
tPLZ/tPZL
tPHZ/tPZH
Open Drain
S1
Open
VCC
GND
VCC
LOAD CIRCUIT FOR
TOTEM-POLE OUTPUTS
LOAD CIRCUIT FOR
3-STATE AND OPEN-DRAIN OUTPUTS
Input
tw
50% VCC
VCC
50% VCC
0V
VOLTAGE WAVEFORMS
PULSE DURATION
Timing Input
tsu
50% VCC
th
Data Input
50% VCC
50% VCC
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
VCC
0V
VCC
0V
Input
50% VCC
50% VCC
VCC
0V
tPLH
In-Phase
Output
tPHL
50% VCC
tPHL
VOH
50% VCC
VOL
tPLH
Out-of-Phase
Output
50% VCC
VOH
50% VCC
VOL
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
Output
Control
50% VCC
50% VCC
VCC
0V
tPZL
Output
Waveform 1
S1 at VCC
(see Note B)
50% VCC
tPLZ
≈VCC
VOL + 0.3 V _VOL
tPZH
Output
Waveform 2
S1 at GND
(see Note B)
50% VCC
tPHZ
VOH
VOH − 0.3 V
≈0 V
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tr ≤ 3 ns, tf ≤ 3 ns.
D. The outputs are measured one at a time with one input transition per measurement.
E. All parameters and waveforms are not applicable to all devices.
Figure 1. Load Circuit and Voltage Waveforms
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