PT6722 Datasheet, PDF (5/7 Pages) Texas Instruments – 14-A Low-Voltage Programmable Integrated Switching Regulator

Application Notes continued
PT6701/6702/6703, & PT6721/6722
Pin-Coded Output Voltage Programming on
Non-Isolated “Excalibur™” Series ISRs
Programmable versions of the PT6700 and PT6720 series
of Excalibur ISRs incorporate a pin-coded output voltage
control. These regulators include up to five control pins,
identified VID0–VID4 (pins 3–7) respectively. By selectively
grounding VID0-VID4, the output voltage of these regu-
lators can be programmed in incremental steps over a
specified output voltage range. The program code and voltage
range is designed to be compatible with the “Voltage ID”
specification defined for popular microprocessors. Refer to
Figure 1 for the connection schematic, and the applicable
data sheet for the program code.
Notes:
1. The programming convention is as follows:-
Logic 0: Connect to pin13 (Remote Sense Ground).
Logic 1: Open circuit/open drain (See notes 2, & 4)
2. Do not connect pull-up resistors to the voltage
programming pins.
3. To minimize output voltage error, always use pin 13
(Remote Sense Ground) as the logic “0” reference. While
the regular ground (pins 14-18) can also be used for
programming, doing so will degrade the load regulation of
the product.
4. If active devices are used to ground the voltage control pins,
low-level open drain MOSFET devices should be used over
bipolar transistors. The inherent V_ce(sat) in bipolar devices
introduces errors in the device’s internal voltage control
circuit. Discrete transistors such as the BSS138, 2N7002,
IRLML2402, are examples of appropriate devices.
Active Voltage Programming:
Special precautions should be taken when making changes
to the voltage control progam code while the unit is
powered. It is highly recommended that the ISR be either
powered down or held in standby. Changes made to the
program code while V_out is enabled induces high current
transients through the device. This is the result of the
electrolytic output capacitors being either charged or dis-
charged to the new output voltage set-point. The transient
current can be minimized by making only incremental
changes to the binary code, i.e. one LSB at a time. A
minimum of 100µs settling time between each program
state is also recommended. Making non-incremental
changes to VID3 and VID4 with the output enabled is
discouraged. If they are changed, the transients induced
can overstress the device and may also activate the OVP
drive output. If the program code cannot be asserted prior
to power-up, pull pin 8 (STBY) to GND during the period
that the input voltage is applied. The release of pin 8 will
then to allow the device to initiate a soft-start power-up to
the program voltage.
Figure 1
V _in
STBY
COM
1µH
(Optional)
76543
VID4 - VID0
1
OVP
23
SNS(+)
10-12
Vin
PT6700
19-22
Vo
Pwr
Good
2
STBY
8
GND
14-18
SNS(-)
13
+
C _in
+
C _out
Q1
V _out
L
O
A
D
COM
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