P82B96_09 Datasheet, PDF (5/28 Pages) Texas Instruments – DUAL BIDIRECTIONAL BUS BUFFER

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P82B96
DUAL BIDIRECTIONAL BUS BUFFER
SCPS144B – MAY 2006 – REVISED JULY 2007
Electrical Characteristics
V_CC = 2.3 V to 2.7 V, voltages are specified with respect to GND (unless otherwise noted)
PARAMETER
TEST
CONDITIONS
T_A = 25°C
MIN
TYP⁽¹⁾ MAX
T_A = –40°C to 85°C _UNIT
MIN
MAX
ΔV/ΔT_IN
Temperature coefficient of
input thresholds
Sx, Sy
–2
mV/°C
V_OL
Low-level output voltage
ΔV/ΔT_OUT
Temperature coefficient of
output low levels⁽³⁾
Sx, Sy
Sx, Sy
I_Sx, I_Sy = 3 mA
I_Sx, I_Sy = 0.2 mA
I_Sx, I_Sy = 0.2 mA
0.8 0.88
1
0.67 0.73
0.79
–1.8
(2)
(2)_V
mV/°C
I_CC
ΔI_CC
Quiescent supply current
Additional supply current
per pin low
Tx, Ty
Sx = Sy = V_CC
0.9
1.8
1.7
2.75
2 mA
3 mA
Dynamic output sink
V_Sx, V_Sy > 2 V,
I_IOS
capability on I²C bus
Sx, Sy
Leakage current on I²C bus
V_Rx, V_Ry = low
V_Sx, V_Sy = 2.5 V,
V_Rx, V_Ry = high
Dynamic output sink
capability on buffered bus
Tx, Ty
V_Tx, V_Ty > 1 V,
V_Sx, V_Sy = low on
I²C bus = 0.4 V
I_IOT
Leakage current
on buffered bus
V_Tx, V_Ty = V_CC =
2.5 V,
V_Sx, V_Sy = high
Input current from I²C bus
Sx, Sy
Bus low, V_Rx,
V_Ry = high
I_I
Input current
from buffered bus
Bus low, V_Rx,
Rx, Ry ^{VRy = 0.4 V}
Leakage current
on buffered bus input
V_Rx, V_Ry = V_CC
7
18
0.1
60
100
0.1
–1
–1
1
5.5
1
60
mA
1 μA
mA
1
1 μA
1
1 μA
1.5
V_IT
Input threshold
Sx, Sy
Input logic level high
threshold ⁽⁴⁾
on normal I²C bus
Input logic level low
threshold ⁽⁴⁾
on normal I²C bus
0.65
0.7
0.6 0.65
(2)
(2)
V
V_IOdiff
Input/output logic level
difference ⁽⁵⁾
Input logic level high 0.58 V_CC
0.58 V_CC
Rx, Ry Input threshold
0.5 V_CC
Input logic level low
0.42 V_CC
0.42 V_CC
Sx, Sy
(V_Sx output low
at 3 mA) –
(V_Sx input high max)
for I²C applications
100
150
100
mV
Sx, Sy are low, V_CC
V_IOrel
V_CC voltage at which all
buses are released
Sx, Sy ramping, voltage on
Tx, Ty Tx, Ty lowered until
1
released
1
V
ΔV/ΔT_REL
Temperature coefficient of release
voltage
–4
mV/°C
C_in
Input capacitance
Rx, Ry
2.5
4
4 pF
(1) Typical value is at V_CC = 2.5 V, T_A = 25°C
(2) See the Typical Characteristics section of this data sheet.
(3) The output logic low depends on the sink current.
(4) The input logic threshold is independent of the supply voltage.
(5) The minimum value requirement for pullup current, 200 μA, ensures that the minimum value for V_SX output low always exceeds the
minimum V_Sx input high level to eliminate any possibility of latching. The specified difference is specified by design within any device.
While the tolerances on absolute levels allow a small probability that the low from one Sx output is recognized by an Sx input of another
P82B96, this has no consequences for normal applications. In any design, the Sx pins of different devices should never be linked,
because the resulting system would be very susceptible to induced noise and would not support all I²C operating modes.
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