MSP430X33X Datasheet, PDF (5/27 Pages) Texas Instruments – MIXED SIGNAL MICROCONTROLLERS

MSP430x33x
MIXED SIGNAL MICROCONTROLLERS
SLAS163 – FEBRUARY 1998
instruction set
The instruction set for this register-register architecture provides a powerful and easy-to-use assembly
language. The instruction set consists of 52 instructions, with three formats and seven addressing modes.
Table 1 provides a summation and example of the three types of instruction formats; the addressing modes are
listed in Table 2.
Table 1. Instruction Word Formats
Dual operands, source–destination
Single operands, destination only
Relative jump, un–/conditional
e.g. ADD R4,R5
e.g. CALL R8
e.g. JNE
R4 + R5 → R5
PC → (TOS), SR → (TOS), R8→ PC
Jump-on equal bit = 0
Instructions that can operate on both word and byte data are differentiated by the suffix ’.B’ when a byte
operation is required.
Examples:
Instructions for word operation:
Instructions for byte operation:
MOV ede,toni
MOV.B
ede,toni
ADD
#235h,&MEM
ADD.B
#35h,&MEM
PUSH R5
PUSH.B R5
SWPB R5
–––
Table 2. Address Mode Descriptions
ADDRESS MODE
S
register
√
indexed
√
symbolic (PC relative)
√
absolute
√
indirect
√
indirect autoincrement
√
immediate
√
NOTE 1: S = source, D = destination.
D
SYNTAX
√ MOV Rs,Rd
√ MOV X(Rn),Y(Rm)
√ MOV EDE,TONI
√ MOV &MEM,&TCDAT
MOV @Rn,Y(Rm)
MOV @Rn+,Rm
MOV #X,TONI
EXAMPLE
MOV R10,R11
MOV 2(R5),6(R6)
MOV @R10,Tab(R6)
MOV @R10+,R11
MOV #45,TONI
OPERATION
R10 → R11
M(2+R5) → M(6+R6)
M(EDE) → M(TONI)
M(MEM) → M(TCDAT)
M(R10) → M(Tab+R6)
M(R10) → R11
R10 + 2→ R10
#45 → M(TONI)
Computed branches (BR) and subroutine calls (CALL) instructions use the same addressing modes as the other
instructions. These addressing modes provide indirect addressing, ideally suited for computed branches and
calls. The full use of this programming capability permits a program structure different from conventional 8- and
16-bit controllers. For example, numerous routines can easily be designed to deal with pointers and stacks
instead of using Flag type programs for flow control.
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