LMH6503MAX Datasheet, PDF (5/33 Pages) Texas Instruments – LMH6503 Wideband, Low Power, Linear Variable Gain Amplifier

LMH6503
www.ti.com
SNOSA78E – OCTOBER 2003 – REVISED APRIL 2013
Electrical Characteristics⁽¹⁾ (continued)
Unless otherwise specified, all limits ensured for T_J = 25°C, V_S = ±5V, A_V(MAX) = 10, V_CM = 0V, R_F = 1kΩ, R_G = 174Ω, V_{IN_DIFF}
= ±0.1V, R_L = 100Ω, V_G = +1V. Boldface limits apply at the temperature extremes.
Parameter
Test Conditions
Min ⁽²⁾
Typ ⁽²⁾
Max ⁽²⁾
Units
DC & Miscellaneous Performance
GACCU Gain Accuracy (see Application
Information)
G Match Gain Matching (see Application
Information)
K
Gain Multiplier (see Application
Information)
V_G =1.0V
0V < V_G < 1V
−0.7V < V_G < 1V
V_G = 1.0
0 < V_G < 1V
−0.7V < V_G < 1V
+0.25 +0.9/−0.4
±0.3 +1.3/−1.5
dB
±0.4 +4.4/−4.3
–
±0.7
–
+1.7/−1.1
dB
–
+4.0/−4.7
1.58
1.58
1.72
1.87
1.91
V/V
V_CM
Input Voltage Range
Pin 3 & 6 Common Mode,
±2.0
±2.2
V
|CMRR| > 50dB⁽⁶⁾
±1.80
V_{IN_ DIFF} Differential Input Voltage
Across pins 3 & 6
±0.34
±0.28
±0.37
V
I_{RG MAX}
I_BIAS
R_G Current
Bias Current
TC_BIAS
I _OFF
TC I_OFF
R_IN
C_IN
IV_G
TC IV_G
R V_G
C V_G
V_OUT
Bias Current Drift
Offset Current
Offset Current Drift
Input Resistance
Input Capacitance
V_G Bias Current
V_G Bias Drift
V_G Input Resistance
V_G Input Capacitance
Output Voltage Range
Pins 4 & 5
Pins 3 & 6⁽⁷⁾
Pins 3 & 6⁽⁷⁾,
V_S= ±2.5V
Pin 3 & 6⁽⁸⁾
Pin 3 & 6
See ⁽⁸⁾
Pin 3 & 6
Pin 3 & 6
Pin 2, V_G = 1.4V⁽⁷⁾
Pin 2⁽⁸⁾
Pin 2
Pin 2
R_L = 100Ω
R_L Open
±1.70
±1.60
±3.00
±2.97
±3.95
±3.90
±2.30
11
3
100
0.01
5
750
5
45
20
70
1.3
±3.20
±4.05
mA
18
20
µA
10
13
nA/°C
2.0
2.5
µA
nA/°C
kΩ
pF
µA
nA/°C
KΩ
pF
V
R_OUT
Output Impedance
DC
0.1
Ω
I_OUT
Output Current
V_OUT ±4V from Rails
±75
±90
mA
±70
V_{O OFFSET} Output Offset Voltage
−1V < V_G < 1V
±80
±350
mV
±380
+PSRR
−PSRR
CMRR
+Power Supply Rejection Ratio
(See ⁽⁹⁾)
−Power Supply Rejection Ratio
(See ⁽⁹⁾)
Common Mode Rejection Ratio
(See ⁽¹⁰⁾)
Input Referred, 1V change,
V_G = 1.4V
Input Referred, 1V change,
V_G = 1.4V
Input Referred, V_G = 1V
−1.8V < V_CM < 1.8V
−80
−58
dB
−56
−67
−57
dB
−51
−67
dB
(6) CMRR definition: [|ΔV_OUT/ΔV_CM|/A_V] with 0.1V differential input voltage. ΔV_OUT is the change in output voltage with offset shift
subtracted out.
(7) Positive current correspondes to current flowing in the device.
(8) Drift determined by dividing the change in parameter distribution at temperature extremes by the total temperature change.
(9) +PSRR definition: [|ΔV_OUT/ΔV⁺| /A_V], -PSRR definition: [|ΔV_OUT/ΔV^−| /A_V] with 0.1V differential input voltage. ΔV_OUT is the change in
output voltage with offset shift subtracted out.
(10) CMRR definition: [|ΔV_OUT/ΔV_CM|/A_V] with 0.1V differential input voltage. ΔV_OUT is the change in output voltage with offset shift
subtracted out.
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