DRV8843_15 Datasheet, PDF (5/20 Pages) Texas Instruments – DUAL H-BRIDGE DRIVER IC

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DRV8843
SLVSAS8C – APRIL 2011 – REVISED AUGUST 2013
THERMAL INFORMATION
THERMAL METRIC⁽¹⁾
DRV8843
PWP
UNITS
θ_JA
θ_JCtop
θ_JB
ψ_JT
ψ_JB
θ_JCbot
Junction-to-ambient thermal resistance⁽²⁾
Junction-to-case (top) thermal resistance⁽³⁾
Junction-to-board thermal resistance⁽⁴⁾
Junction-to-top characterization parameter⁽⁵⁾
Junction-to-board characterization parameter⁽⁶⁾
Junction-to-case (bottom) thermal resistance⁽⁷⁾
28 PINS
31.6
15.9
5.6
0.2
5.5
1.4
°C/W
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
(2) The junction-to-ambient thermal resistance under natural convection is obtained in a simulation on a JEDEC-standard, high-K board, as
specified in JESD51-7, in an environment described in JESD51-2a.
(3) The junction-to-case (top) thermal resistance is obtained by simulating a cold plate test on the package top. No specific JEDEC-
standard test exists, but a close description can be found in the ANSI SEMI standard G30-88.
(4) The junction-to-board thermal resistance is obtained by simulating in an environment with a ring cold plate fixture to control the PCB
temperature, as described in JESD51-8.
(5) The junction-to-top characterization parameter, ψ_JT, estimates the junction temperature of a device in a real system and is extracted
from the simulation data for obtaining θ_JA, using a procedure described in JESD51-2a (sections 6 and 7).
(6) The junction-to-board characterization parameter, ψ_JB, estimates the junction temperature of a device in a real system and is extracted
from the simulation data for obtaining θ_JA , using a procedure described in JESD51-2a (sections 6 and 7).
(7) The junction-to-case (bottom) thermal resistance is obtained by simulating a cold plate test on the exposed (power) pad. No specific
JEDEC standard test exists, but a close description can be found in the ANSI SEMI standard G30-88.
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RECOMMENDED OPERATING CONDITIONS
over operating free-air temperature range (unless otherwise noted)
V_M
V_REF
I_V3P3
f_PWM
Motor power supply voltage range⁽¹⁾
VREF input voltage⁽²⁾
V3P3OUT load current
Externally applied PWM frequency
(1) All V_M pins must be connected to the same supply voltage.
(2) Operational at VREF between 0 V and 1 V, but accuracy is degraded.
MIN
NOM
MAX UNIT
8.2
45
V
1
3.5
V
0
1
mA
0
100
kHz
ELECTRICAL CHARACTERISTICS
over operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
POWER SUPPLIES
I_VM
VM operating supply current
I_VMQ
VM sleep mode supply current
V_UVLO
VM undervoltage lockout voltage
V3P3OUT REGULATOR
V_M = 24 V, f_PWM < 50 kHz
V_M = 24 V
V_M rising
V_3P3
V3P3OUT voltage
LOGIC-LEVEL INPUTS
IOUT = 0 to 1 mA
V_IL
Input low voltage
V_IH
Input high voltage
V_HYS
Input hysteresis
I_IL
Input low current
I_IH
Input high current
R_PD
Internal pulldown resistance
nFAULT OUTPUT (OPEN-DRAIN OUTPUT)
VIN = 0
VIN = 3.3 V
V_OL
Output low voltage
I_O = 5 mA
MIN
TYP
MAX UNIT
5
8 mA
10
20
μA
7.8
8.2
V
3.2
3.3
3.4
V
0.6
0.7
V
2.2
5.25
V
0.3
0.45
0.6
V
–20
20
μA
100
μA
100
kΩ
0.5
V
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