CDC328A Datasheet, PDF (5/7 Pages) Texas Instruments – 1-LINE TO 6-LINE CLOCK DRIVER WITH SELECTABLE POLARITY

CDC328A
1-LINE TO 6-LINE CLOCK DRIVER
WITH SELECTABLE POLARITY
SCAS327B – DECEMBER 1992 – REVISED NOVEMBER 1995
PARAMETER MEASUREMENT INFORMATION
From Output
Under Test
CL = 50 pF
(see Note A)
500 Ω
LOAD CIRCUIT FOR OUTPUTS
Input
(see Note B)
tPLH
1.5 V
1.5 V
3V
0V
tPHL
Output
1.5 V
0.8 V
tr
2V
VOH
1.5 V
0.8 V _VOL
tf
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
NOTES: A. CL includes probe and jig capacitance.
B. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr ≤ 2.5 ns, tf ≤ 2.5 ns.
Figure 1. Load Circuit and Voltage Waveforms
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