CD74HC147 Datasheet, PDF (5/6 Pages) Texas Instruments – High Speed CMOS Logic 10-to-4 Line Priority Encoder

CD74HC147, CD74HCT147
Switching Specifications Input t_r, t_f = 6ns (Continued)
PARAMETER
TEST
25^oC
-40^oC TO 85^oC -55^oC TO 125^oC
SYMBOL CONDITIONS V_CC (V) MIN TYP MAX MIN MAX MIN MAX UNITS
Power Dissipation Capaci-
C_PD
-
tance
(Notes 4, 5)
5
-
32
-
-
-
-
-
pF
HCT TYPES
Propagation Delay,
t_PLH, t_PHL C_L = 50pF
4.5
-
-
35
-
44
-
Input to Output (Figure 2)
5
-
14
-
-
-
-
53
ns
-
ns
Transition Times (Figure 2) t_TLH, t_THL C_L = 50pF
4.5
-
-
15
-
19
-
Input Capacitance
C_IN
-
-
-
-
10
-
10
-
Power Dissipation Capaci-
C_PD
-
tance
(Notes 4, 5)
5
-
42
-
-
-
-
22
ns
10
pF
-
pF
NOTES:
4. C_PD is used to determine the dynamic power consumption, per gate.
5. P_D = V_CC2 f_i (C_PD + C_L) where f_i = Input Frequency, C_L = Output Load Capacitance, V_CC = Supply Voltage.
Test Circuits and Waveforms
t_r = 6ns
INPUT
90%
50%
10%
t_f = 6ns
V_CC
GND
t_THL
INVERTING
OUTPUT
t_PHL
t_TLH
90%
50%
10%
t_PLH
FIGURE 6. HC AND HCU TRANSITION TIMES AND PROPAGA-
TION DELAY TIMES, COMBINATION LOGIC
t_r = 6ns
INPUT
2.7V
1.3V
0.3V
t_f = 6ns
3V
GND
t_THL
INVERTING
OUTPUT
t_PHL
t_TLH
90%
1.3V
10%
t_PLH
FIGURE 7. HCT TRANSITION TIMES AND PROPAGATION
DELAY TIMES, COMBINATION LOGIC
5